Issued Patents All Time
Showing 26–50 of 53 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8032874 | Generation of executable threads having source code specifications that describe network packets | Eric R. Keller | 2011-10-04 |
| 7990867 | Pipeline for processing network packets | Eric R. Keller | 2011-08-02 |
| 7949793 | Method and apparatus for providing an interface between a programmable circuit and a processor | Gordon J. Brebner | 2011-05-24 |
| 7949790 | Machines for inserting or removing fixed length data at a fixed location in a serial data stream | Gordon J. Brebner, Michael E. Attig | 2011-05-24 |
| 7823162 | Thread circuits and a broadcast channel in programmable logic | Eric R. Keller | 2010-10-26 |
| 7792117 | Method for simulating a processor of network packets | Eric R. Keller, Graham F. Schelle | 2010-09-07 |
| 7788402 | Circuit for modification of a network packet by insertion or removal of a data segment | Eric R. Keller, Graham F. Schelle | 2010-08-31 |
| 7784014 | Generation of a specification of a network packet processor | Gordon J. Brebner, Christopher E. Neely, Eric R. Keller, Chidamber R. Kulkarni, Michael A. Baxter +2 more | 2010-08-24 |
| 7770179 | Method and apparatus for multithreading on a programmable logic device | Gordon J. Brebner, Eric R. Keller, Chidamber R. Kulkarni | 2010-08-03 |
| 7698449 | Method and apparatus for configuring a processor embedded in an integrated circuit for use as a logic element | Eric R. Keller | 2010-04-13 |
| 7689726 | Bootable integrated circuit device for readback encoding of configuration data | Prasanna Sundararajan, Brandon J. Blodget, Scott P. McMillan, Eric R. Keller | 2010-03-30 |
| 7653895 | Memory arrangement for message processing by a plurality of threads | Eric R. Keller | 2010-01-26 |
| 7627291 | Integrated circuit having a routing element selectively operable to function as an antenna | Daniel J. Downs | 2009-12-01 |
| 7574680 | Method and apparatus for application-specific programmable memory architecture and interconnection network on a chip | Chidamber R. Kulkarni, Gordon J. Brebner, Eric R. Keller | 2009-08-11 |
| 7552405 | Methods of implementing embedded processor systems including state machines | — | 2009-06-23 |
| 7552042 | Method for message processing on a programmable logic device | Gordon J. Brebner, Eric R. Keller, Chidamber R. Kulkarni | 2009-06-23 |
| 7328335 | Bootable programmable logic device for internal decoding of encoded configuration data | Prasanna Sundararajan, Brandon J. Blodget, Scott P. McMillan, Eric R. Keller | 2008-02-05 |
| 7227378 | Reconfiguration of a programmable logic device using internal control | Brandon J. Blodget, Scott P. McMillan, Prasanna Sundararajan, Eric R. Keller, Derek R. Curd +3 more | 2007-06-05 |
| 7228520 | Method and apparatus for a programmable interface of a soft platform on a programmable logic device | Eric R. Keller, Gordon J. Brebner, Chidamber R. Kulkarni | 2007-06-05 |
| 7185309 | Method and apparatus for application-specific programmable memory architecture and interconnection network on a chip | Chidamber R. Kulkarni, Gordon J. Brebner, Eric R. Keller | 2007-02-27 |
| 7139995 | Integration of a run-time parameterizable core with a static circuit design | Daniel J. Downs, Russell J. Morgan, Cameron Patterson | 2006-11-21 |
| 7133978 | Method and apparatus for processing data stored in a memory shared among a plurality of processors | Charles Allen Ross, Paul R. Schumacher | 2006-11-07 |
| 7131077 | Using an embedded processor to implement a finite state machine | Eric R. Keller | 2006-10-31 |
| 7076596 | Method of and apparatus for enabling a hardware module to interact with a data structure | Eric R. Keller | 2006-07-11 |
| 7028283 | Method of using a hardware library in a programmable logic device | Eric R. Keller | 2006-04-11 |