Issued Patents All Time
Showing 25 most recent of 35 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7219219 | Hardware initialization method that is independent of boot code architecture | — | 2007-05-15 |
| 7206914 | Non-volatile memory system having a programmably selectable boot code section size | — | 2007-04-17 |
| 6823435 | Non-volatile memory system having a programmably selectable boot code section size | — | 2004-11-23 |
| 6430705 | Method for utilizing virtual hardware descriptions to allow for multi-processor debugging in environments using varying processor revision levels | Travis Wheatley, James A. Treadway | 2002-08-06 |
| 6336212 | Self modifying code to test all possible addressing modes | Christopher Gray | 2002-01-01 |
| 6247146 | Method for verifying branch trace history buffer information | Travis Wheatley, Christopher Gray | 2001-06-12 |
| 6173395 | Mechanism to determine actual code execution flow in a computer | Travis Wheatley, Dan S. Mudgett | 2001-01-09 |
| 6128727 | Self modifying code to test all possible addressing modes | Christopher Gray | 2000-10-03 |
| 6076160 | Hardware-based system for enabling data transfers between a CPU and chip set logic of a computer system on both edges of bus clock signal | — | 2000-06-13 |
| 6021498 | Power management unit including a programmable index register for accessing configuration registers | Rita M. O'Brien | 2000-02-01 |
| 5999476 | Bios memory and multimedia data storage combination | Drew J. Dutton, Dale E. Gulick | 1999-12-07 |
| 5974510 | Method for testing the non-cacheable region functioning of a cache memory controller | Lei Cheng, Thomas Eckert | 1999-10-26 |
| 5964859 | Allocatable post and prefetch buffers for bus bridges | Andy Steinbach, Scott E. Swanstrom | 1999-10-12 |
| 5946497 | System and method for providing microprocessor serialization using programmable fuses | Sherman Lee, James R. MacDonald | 1999-08-31 |
| 5933620 | Method and apparatus for serializing microprocessor identification numbers | Sherman Lee, James R. MacDonald | 1999-08-03 |
| 5920891 | Architecture and method for controlling a cache memory | Andy Steinbach, Scott E. Swanstrom | 1999-07-06 |
| 5862366 | System and method for simulating a multiprocessor environment for testing a multiprocessing interrupt controller | Rodney Schmidt, Steve Ennis | 1999-01-19 |
| 5815734 | System and method for reconfiguring configuration registers of a PCI bus device in response to a change in clock signal frequency | Sherman Lee | 1998-09-29 |
| 5799203 | System for receiving peripheral device capability information and selectively disabling corresponding processing unit function when the device failing to support such function | Sherman Lee, James R. MacDonald | 1998-08-25 |
| 5790663 | Method and apparatus for software access to a microprocessor serial number | Sherman Lee, James R. MacDonald | 1998-08-04 |
| 5790783 | Method and apparatus for upgrading the software lock of microprocessor | Sherman Lee, James R. MacDonald | 1998-08-04 |
| 5790871 | System and method for testing and debugging a multiprocessing interrupt controller | Qadeer A. Qureshi, Steve Ennis | 1998-08-04 |
| 5774544 | Method an apparatus for encrypting and decrypting microprocessor serial numbers | Sherman Lee, James R. MacDonald | 1998-06-30 |
| 5768499 | Method and apparatus for dynamically displaying and causing the execution of software diagnostic/test programs for the silicon validation of microprocessors | James A. Treadway | 1998-06-16 |
| 5678065 | Computer system employing an enable line for selectively adjusting a peripheral bus clock frequency | Sherman Lee | 1997-10-14 |