| 9846660 |
Heterogeneous multiprocessor platform targeting programmable integrated circuits |
Jeffrey M. Fifield, Ralph D. Wittig, Philip B. James-Roxby, Sonal Santan, Devadas Varma +3 more |
2017-12-19 |
| 9824173 |
Software development-based compilation flow for hardware implementation |
Bennet An, Sonal Santan, Fernando J. Martinez Vallina, Pradip K. Jha, David A. Knol +3 more |
2017-11-21 |
| 9218443 |
Heterogeneous multiprocessor program compilation targeting programmable integrated circuits |
Jeffrey M. Fifield, Ralph D. Wittig, Philip B. James-Roxby, Sonal Santan, Devadas Varma +3 more |
2015-12-22 |
| 8352659 |
Segmentation and reassembly of a data value communicated via interrupt transactions |
Richard S. Ballantyne, Mark Paluszkiewicz, Ralph D. Wittig |
2013-01-08 |
| 8296557 |
Providing multiple selectable configuration sources for programmable integrated circuits with fail safe mechanism |
Richard S. Ballantyne, Mark Paluszkiewicz, Ralph D. Wittig |
2012-10-23 |
| 8122239 |
Method and apparatus for initializing a system configured in a programmable logic device |
Philip B. James-Roxby, Stephen A. Neuendorffer |
2012-02-21 |
| 7948269 |
System and method for open drain/open collector structures in an integrated circuit |
Richard S. Ballantyne, Mark Paluszkiewicz, Ralph D. Wittig |
2011-05-24 |
| 7786762 |
Generic buffer circuits and methods for out of band signaling |
Richard S. Ballantyne, Catalin Baetoniu, Mark Paluszkiewicz, Ralph D. Wittig |
2010-08-31 |
| 7784014 |
Generation of a specification of a network packet processor |
Gordon J. Brebner, Christopher E. Neely, Philip B. James-Roxby, Eric R. Keller, Chidamber R. Kulkarni +2 more |
2010-08-24 |