BS

Bradley A. Sharpe-Geisler

AM AMD: 36 patents #243 of 9,279Top 3%
VA Vantis: 34 patents #1 of 24Top 5%
LS Lattice Semiconductor: 28 patents #8 of 544Top 2%
MM Monolithic Memories: 1 patents #17 of 45Top 40%
📍 San Jose, CA: #261 of 32,062 inventorsTop 1%
🗺 California: #2,242 of 386,348 inventorsTop 1%
Overall (All Time): #14,489 of 4,157,543Top 1%
100
Patents All Time

Issued Patents All Time

Showing 26–50 of 100 patents

Patent #TitleCo-InventorsDate
6380759 Variable grain architecture for FPGA integrated circuits Om P. Agrawal, Herman M. Chang, Giap H. Tran 2002-04-30
6359466 Circuitry to provide fast carry 2002-03-19
6353352 Clock tree topology 2002-03-05
6351157 Output buffer for making a high voltage (5.0 volt) compatible input/output in a low voltage (2.5 volt) semiconductor process 2002-02-26
6326808 Inversion of product term line before or logic in a programmable logic device (PLD) Mathew A. Fisk, Apurva S. Patel 2001-12-04
6292930 Methods for configuring FPGA's having variable grain blocks and shared logic for providing time-shared access to interconnect resources Om P. Agrawal, Herman M. Chang, Giap H. Tran 2001-09-18
6275064 Symmetrical, extended and fast direct connections between variable grain blocks in FPGA integrated circuits Om P. Agrawal, Herman M. Chang, Giap H. Tran 2001-08-14
6249144 Methods for configuring FPGA's having variable grain components for providing time-shared access to interconnect resources Om P. Agrawal, Herman M. Chang, Bai Nguyen, Giap H. Tran 2001-06-19
6228696 Semiconductor-oxide-semiconductor capacitor formed in integrated circuit Bai Nguyen 2001-05-08
6218857 Variable sized line driving amplifiers for input/output blocks (IOBs) in FPGA integrated circuits Giap H. Tran 2001-04-17
6216257 FPGA device and method that includes a variable grain function architecture for implementing configuration logic blocks and a complimentary variable length interconnect architecture for providing configurable routing between configuration logic blocks Om P. Agrawal, Herman M. Chang, Giap H. Tran, Bai Nguyen 2001-04-10
6211695 FPGA integrated circuit having embedded SRAM memory blocks with registered address and data input sections Om P. Agrawal, Herman M. Chang, Bai Nguyen 2001-04-03
6204686 Methods for configuring FPGA's having variable grain blocks and shared logic for providing symmetric routing of result output to differently-directed and tristateable interconnect resources Om P. Agrawal, Herman M. Chang, Bai Nguyen, Giap H. Tran 2001-03-20
6191612 Enhanced I/O control flexibility for generating control signals Om P. Agrawal, Giap H. Tran 2001-02-20
6181163 FPGA integrated circuit having embedded SRAM memory blocks and interconnect channel for broadcasting address and control signals Om P. Agrawal, Herman M. Chang, Bai Nguyen 2001-01-30
6175266 Operational amplifier with CMOS transistors made using 2.5 volt process transistors 2001-01-16
6169432 High voltage switch for providing voltages higher than 2.5 volts with transistors made using a 2.5 volt process 2001-01-02
6163175 High voltage detector to control a power supply voltage pump for a 2.5 volt semiconductor process device 2000-12-19
6163168 Efficient interconnect network for use in FPGA device having variable grain architecture Bai Nguyen, Om P. Agrawal, Jack T. Wong, Herman M. Chang 2000-12-19
6154051 Tileable and compact layout for super variable grain blocks within FPGA device Bai Nguyen, Om P. Agrawal, Jack T. Wong, Herman M. Chang, Giap H. Tran 2000-11-28
6150842 Variable grain architecture for FPGA integrated circuits Om P. Agrawal, Herman M. Chang, Giap H. Tran 2000-11-21
6130551 Synthesis-friendly FPGA architecture with variable length and variable timing interconnect Om P. Agrawal, Herman M. Chang, Giap H. Tran, Bai Nguyen 2000-10-10
6127843 Dual port SRAM memory for run time use in FPGA integrated circuits Om P. Agrawal, Herman M. Chang, Bai Nguyen 2000-10-03
6124733 Input buffer providing virtual hysteresis 2000-09-26
6124730 Methods for configuring FPGA's having variable grain components for providing time-shared access to interconnect resources Om P. Agrawal, Herman M. Chang, Bai Nguyen, Giap H. Tran 2000-09-26