Issued Patents All Time
Showing 26–50 of 67 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6525966 | Method and apparatus for adjusting on-chip current reference for EEPROM sensing | Shane Hollmer, Joseph G. Pawletko | 2003-02-25 |
| 6515903 | Negative pump regulator using MOS capacitor | Pau-Lin Chen | 2003-02-04 |
| 6510082 | Drain side sensing scheme for virtual ground flash EPROM array with adjacent bit charge and hold | Pau-Ling Chen, Michael A. Van Buskirk, Santosh Yachareni, Michael Chung, Kazuhiro Kurihara +1 more | 2003-01-21 |
| 6493266 | Soft program and soft program verify of the core cells in flash memory array | Santosh Yachareni, Darlene Hamilton, Kazuhiro Kurihara | 2002-12-10 |
| 6424570 | Modulated charge pump with uses an analog to digital converter to compensate for supply voltage variations | Pau-Ling Chen | 2002-07-23 |
| 6370061 | Ceiling test mode to characterize the threshold voltage distribution of over programmed memory cells | Santosh Yachareni, Kazuhiro Kurihara, Michael Chung | 2002-04-09 |
| 6304487 | Register driven means to control programming voltages | Joseph G. Pawletko, Pau-Ling Chen, James Hong | 2001-10-16 |
| 6295228 | System for programming memory cells | Joseph G. Pawletko, Pau-Ling Chen, James Hong | 2001-09-25 |
| 6292399 | Method and low-power circuits used to generate accurate drain voltage for flash memory core cells in read mode | Pau-Ling Chen, Michael A. Van Buskirk | 2001-09-18 |
| 6292406 | Method and low-power circuits used to generate accurate boosted wordline voltage for flash memory core cells in read mode | Pau-Ling Chen | 2001-09-18 |
| 6288951 | Method and apparatus for continuously regulating a charge pump output voltage using a capacitor divider | Pau-Ling Chen | 2001-09-11 |
| 6275424 | Reduction of voltage stress across a gate oxide and across a junction within a high voltage transistor of an erasable memory device | Pauling Chen | 2001-08-14 |
| 6269025 | Memory system having a program and erase voltage modifier | Shane Hollmer, Pau-Ling Chen | 2001-07-31 |
| 6266275 | Dual source side polysilicon select gate structure and programming method utilizing single tunnel oxide for nand array flash memory | Paul L. Chen, Mike Van Buskirk, Shane Hollmer, Shoichi Kawamura, Chung-You Hu +3 more | 2001-07-24 |
| 6262469 | Capacitor for use in a capacitor divider that has a floating gate transistor as a corresponding capacitor | Pau-Ling Chen, Shane Hollmer | 2001-07-17 |
| 6255799 | Rechargeable shoe | Ark L. Lew, Paul D. Schwartz, Albert C. Sadilek, Joseph J. Suter, Jason E. Jenkins +1 more | 2001-07-03 |
| 6246611 | System for erasing a memory cell | Joseph G. Pawletko, James Hong, Pau-Ling Chen | 2001-06-12 |
| 6240017 | Reduction of voltage stress across a gate oxide and across a junction within a high voltage transistor of an erasable memory device | Pauling Chen | 2001-05-29 |
| 6208561 | Method to reduce capacitive loading in flash memory X-decoder for accurate voltage control at wordlines and select lines | Kazuhiro Kurihara, Pau-Ling Chen | 2001-03-27 |
| 6175523 | Precharging mechanism and method for NAND-based flash memory devices | Andrew Yang, Shane Hollmer | 2001-01-16 |
| 6157167 | Topology for individual battery cell charge control in a rechargeable battery cell array | Paul D. Schwartz, Ark L. Lew, Joseph J. Suter | 2000-12-05 |
| 6137153 | Floating gate capacitor for use in voltage regulators | Pau-Ling Chen, Shane Hollmer | 2000-10-24 |
| 6081455 | EEPROM decoder block having a p-well coupled to a charge pump for charging the p-well and method of programming with the EEPROM decoder block | Pau-Ling Chen, Shane Hollmer | 2000-06-27 |
| 6072725 | Method of erasing floating gate capacitor used in voltage regulator | Shane Hollmer, Pau-Ling Chen | 2000-06-06 |
| 6055366 | Methods and apparatus to perform high voltage electrical rule check of MOS circuit design | Pau-Ling Chen, Shane Hollmer, Alexius H. Tan | 2000-04-25 |