Issued Patents All Time
Showing 51–67 of 67 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6009014 | Erase verify scheme for NAND flash | Shane Hollmer, Chung-You Hu, Pau-Ling Chen, Jonathan S. Su, Ravi Prakash Gutala +1 more | 1999-12-28 |
| 6005804 | Split voltage for NAND flash | Shane Hollmer, Pau-Ling Chen | 1999-12-21 |
| 5999452 | Dual source side polysilicon select gate structure and programming method utilizing single tunnel oxide for NAND array flash memory | Pau-Ling Chen, Mike Van Buskirk, Shane Hollmer, Shoichi Kawamura, Chung-You Hu +3 more | 1999-12-07 |
| 5995417 | Scheme for page erase and erase verify in a non-volatile memory array | Pau-Ling Chen, Michael Chung, Shane Hollmer, Vincent Leung, Masaru Yano | 1999-11-30 |
| 5978266 | Array VSS biasing for NAND array programming reliability | Pau-Ling Chen, Shane Hollmer, Michael Chung | 1999-11-02 |
| 5978267 | Bit line biasing method to eliminate program disturbance in a non-volatile memory device and memory device employing the same | Pau-Ling Chen, Michael A. Van Buskirk, Shane Hollmer, Michael Chung, Vincent Leung +2 more | 1999-11-02 |
| 5973546 | Charge pump circuit architecture | Pau-Ling Chen, Shane Hollmer | 1999-10-26 |
| 5939928 | Fast high voltage NMOS pass gate for integrated circuit with high voltage generator | Pau-Ling Chen, Shane Hollmer | 1999-08-17 |
| 5912489 | Dual source side polysilicon select gate structure utilizing single tunnel oxide for NAND array flash memory | Pau-Ling Chen, Mike Van Buskirk, Shane Hollmer, Shoichi Kawamura, Chung-You Hu +3 more | 1999-06-15 |
| 5909396 | High voltage NMOS pass gate having supply range, area, and speed advantages | Pau-Ling Chen, Shane Hollmer, Chung-You Hu, Narbeh Derhacobian | 1999-06-01 |
| 5852576 | High voltage NMOS pass gate for integrated circuit with high voltage generator and flash non-volatile memory device having the pass gate | Pau-Ling Chen, Shane Hollmer, Shoichi Kawamura, Michael Chung, Vincent Leung +1 more | 1998-12-22 |
| 5844840 | High voltage NMOS pass gate having supply range, area, and speed advantages | Pau-Ling Chen, Shane Hollmer, Chung-You Hu, Narbeh Derhacobian | 1998-12-01 |
| 5821800 | High-voltage CMOS level shifter | Shoichi Kawamura, Pau-Ling Chen, Shane Hollmer | 1998-10-13 |
| 5818288 | Charge pump circuit having non-uniform stage capacitance for providing increased rise time and reduced area | Pau-Ling Chen, Shane Hollmer | 1998-10-06 |
| 5801579 | High voltage NMOS pass gate for integrated circuit with high voltage generator | Pau-Ling Chen, Shane Hollmer, Shoichi Kawamura, Michael Chung, Vincent Leung +1 more | 1998-09-01 |
| 5644207 | Integrated power source | Ark L. Lew, Joseph J. Suter | 1997-07-01 |
| 5638326 | Parallel page buffer verify or read of cells on a word line using a signal from a reference cell in a flash memory device | Shane Hollmer, Pau-Ling Chen | 1997-06-10 |