Issued Patents 2025
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12322694 | Metal-insulator-metal device with improved performance | Dun-Nian Yaung, Jen-Cheng Liu, Hsing-Chih Lin, Kuan-Hua Lin | 2025-06-03 |
| 12315843 | Hybrid bonding technology for stacking integrated circuits | Kuo-Ming Wu, Ching-Chun Wang, Dun-Nian Yaung, Hsing-Chih Lin, Jen-Cheng Liu +3 more | 2025-05-27 |
| 12300669 | Backside contact for thermal displacement in a multi-wafer stacked integrated circuit | Ping-Tzu Chen, Hsing-Chih Lin | 2025-05-13 |
| 12283564 | Semiconductor structure and manufacturing method thereof | Dun-Nian Yaung, Jen-Cheng Liu, Hsing-Chih Lin, Zheng-Xun Li | 2025-04-22 |
| 12278250 | Semiconductor device including image sensor and method of forming the same | Dun-Nian Yaung, Jen-Cheng Liu, Hsing-Chih Lin, Feng-Chi Hung, Shyh-Fann Ting | 2025-04-15 |
| 12230554 | Shield structure for backside through substrate vias (TSVs) | Dun-Nian Yaung, Hsing-Chih Lin, Jen-Cheng Liu, Wei-Tao Tsai | 2025-02-18 |
| 12218106 | Backside contact to improve thermal dissipation away from semiconductor devices | Dun-Nian Yaung, Hsing-Chih Lin, Jen-Cheng Liu, Yi-Shin Chu, Ping-Tzu Chen +1 more | 2025-02-04 |
| 12218165 | Semiconductor image sensor and method of manufacturing the same | Dun-Nian Yaung, Jen-Cheng Liu, Hsing-Chih Lin, Che-Wei Chen | 2025-02-04 |
| 12218166 | CSI with controllable isolation structure and methods of manufacturing and using the same | Dun-Nian Yaung, Jen-Cheng Liu, Wen-Chang Kuo, Shih-Han Huang | 2025-02-04 |
| 12205868 | Oversized via as through-substrate-via (TSV) stop layer | Dun-Nian Yaung, Hsing-Chih Lin, Jen-Cheng Liu, Yi-Shin Chu, Ping-Tzu Chen | 2025-01-21 |