Issued Patents 2024
Showing 1–25 of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12176435 | Method for forming fin field effect transistor (FinFET) device structure with conductive layer between gate and gate contact | Chao-Hsun Wang, Kuo-Yi Chao, Rueijer Lin, Chen-Yuan Kao | 2024-12-24 |
| 12166088 | Source/drain contact structure | Ting Fang, Chung-Hao Cai, Jui-Ping Lin, Chia-Hsien Yao, Chen-Ming Lee +1 more | 2024-12-10 |
| 12165929 | Semiconductor device and method | Chun-Han Chen, Chen-Ming Lee, Fu-Kai Yang | 2024-12-10 |
| 12142565 | Different via configurations for different via interface requirements | Shih-Che Lin, Po-Yu Huang, Chao-Hsun Wang, Kuo-Yi Chao, Feng-Yu Chang +3 more | 2024-11-12 |
| 12125743 | Via-first process for connecting a contact and a gate electrode | Chao-Hsun Wang, Kuo-Yi Chao, Wang-Jung Hsueh | 2024-10-22 |
| 12125879 | Epitaxial source/drain structure and method | I-Wen Wu, Chen-Ming Lee, Fu-Kai Yang, Chun-An Lin, Wei-Yuan Lu +2 more | 2024-10-22 |
| 12119378 | Methods of forming epitaxial source/drain features in semiconductor devices | Jia-Heng Wang, I-Wen Wu, Chen-Ming Lee, Fu-Kai Yang | 2024-10-15 |
| 12107166 | Fin field effect transistor (FinFET) device structure with isolation layer and method for forming the same | Chung-Huai CHANG, Chao-Hsun Wang, Kuo-Yi Chao | 2024-10-01 |
| 12080769 | Contact structure with silicide and method for forming the same | Kai-Hsuan Lee, Shih-Che Lin, Po-Yu Huang, Shih-Chieh Wu, I-Wen Wu +2 more | 2024-09-03 |
| 12074063 | Contact formation method and related structure | Shih-Che Lin, Chao-Hsun Wang, Chia-Hsien Yao, Fu-Kai Yang | 2024-08-27 |
| 12068200 | Backside via with a low-k spacer | Po-Yu Huang, I-Wen Wu, Chen-Ming Lee, Fu-Kai Yang | 2024-08-20 |
| 12068201 | Semiconductor devices | Shih-Chieh Wu, Pang-Chi Wu, Kuo-Yi Chao, Hsien-Huang Liao, Tung-Heng Hsieh +1 more | 2024-08-20 |
| 12068378 | Semiconductor devices with backside via and methods thereof | Po-Yu Huang, Chen-Ming Lee, I-Wen Wu, Fu-Kai Yang | 2024-08-20 |
| 12068396 | Parasitic capacitance reduction | Jia-Heng Wang, Chun-Han Chen, I-Wen Wu, Chen-Ming Lee, Fu-Kai Yang | 2024-08-20 |
| 12062578 | Prevention of contact bottom void in semiconductor fabrication | Yun Lee, Chung-Ting Ko, Chen-Ming Lee, Fu-Kai Yang | 2024-08-13 |
| 12057488 | Methods of reducing capacitance in field-effect transistors | Chun-Han Chen, Chen-Ming Lee, Fu-Kai Yang | 2024-08-06 |
| 12057392 | Conductive features having varying resistance | Jia-En Lee, Po-Yu Huang, Shih-Che Lin, Chao-Hsun Wang, Kuo-Yi Chao +1 more | 2024-08-06 |
| 12009400 | Device providing multiple threshold voltages and methods of making the same | Yung-Hsiang Chan, Shan-Mei Liao, Wen-Hung Huang, Jian-Hao Chen, Kuo-Feng Yu | 2024-06-11 |
| 12009363 | Method for forming source/drain contacts | Shao-Ming Koh, Chen-Ming Lee, Fu-Kai Yang | 2024-06-11 |
| 12002863 | Semiconductor device with air-gap spacers | Kai-Hsuan Lee, Chen-Ming Lee, Fu-Kai Yang, Yen-Ming Chen | 2024-06-04 |
| 11990378 | Semiconductor device and method | Chien-Yuan Chen, Jui-Ping Lin, Chen-Ming Lee, Fu-Kai Yang | 2024-05-21 |
| 11978664 | Polishing interconnect structures in semiconductor devices | Pang-Sheng Chang, Chao-Hsun Wang, Kuo-Yi Chao, Fu-Kai Yang, Li-Chieh Wu +1 more | 2024-05-07 |
| 11961886 | Semiconductor structure with conductive structure | Jia-Heng Wang, Pang-Chi Wu, Chao-Hsun Wang, Fu-Kai Yang | 2024-04-16 |
| 11935932 | Semiconductor device and method | Chun-Han Chen, Chen-Ming Lee, Fu-Kai Yang | 2024-03-19 |
| 11915971 | Contact formation method and related structure | Chao-Hsun Wang, Wang-Jung Hsueh, Kuo-Yi Chao | 2024-02-27 |