Issued Patents 2024
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12156486 | Horizontal RRAM device and architecture for variability reduction | Timothy Mathew Philip, Nicholas Anthony Lanzillo, Youngseok Kim, Lawrence A. Clevenger | 2024-11-26 |
| 12106963 | Self aligned pattern formation post spacer etchback in tight pitch configurations | Sean D. Burns, Lawrence A. Clevenger, Matthew E. Colburn, Nelson Felix, Sivananda K. Kanakasabapathy +2 more | 2024-10-01 |
| 11990410 | Top via interconnect having a line with a reduced bottom dimension | Brent A. Anderson, Lawrence A. Clevenger, Nicholas Anthony Lanzillo, Kisik Choi, Robert R. Robison | 2024-05-21 |
| 11961759 | Interconnects having spacers for improved top via critical dimension and overlay tolerance | Brent A. Anderson, Lawrence A. Clevenger, Nicholas Anthony Lanzillo, Kisik Choi, Robert R. Robison | 2024-04-16 |
| 11955424 | Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device | Benjamin D. Briggs, Lawrence A. Clevenger, Bartlet H. DeProspo, Huai Huang, Michael Rizzolo | 2024-04-09 |
| 11894265 | Top via with damascene line and via | Lawrence A. Clevenger, Brent A. Anderson, Kisik Choi, Nicholas Anthony Lanzillo, Robert R. Robison | 2024-02-06 |
| 11876023 | Conformal film thickness determination using angled geometric features and vertices tracking | Marc A. Bergendahl, James J. Demarest, Jean Wynne, Christopher J. Waskiewicz, Jonathan Fry | 2024-01-16 |
| 11869808 | Top via process with damascene metal | Lawrence A. Clevenger, Brent A. Anderson, Nicholas Anthony Lanzillo, Kisik Choi, Robert R. Robison | 2024-01-09 |