| 11844223 |
Ferroelectric memory chiplet as unified memory in a multi-dimensional packaging |
Amrita Mathuriya, Christopher B. Wilkerson, Rajeev Kumar Dokania, Sasikanth Manipatruni |
2023-12-12 |
| 11841757 |
Method and apparatus for cycle-by-cycle clock gating of ferroelectric or paraelectric logic and CMOS based logic |
Amrita Mathuriya, Christopher B. Wilkerson, Rajeev Kumar Dokania, Sasikanth Manipatruni |
2023-12-12 |
| 11837268 |
Multi-element ferroelectric gain memory bit-cell having stacked and folded planar capacitors with lateral offset |
Rajeev Kumar Dokania, Amrita Mathuriya, Tanay Gosavi, Noriyuki Sato, Sasikanth Manipatruni |
2023-12-05 |
| 11829699 |
Method to segregate logic and memory into separate dies for thermal management in a multi-dimensional packaging |
Amrita Mathuriya, Christopher B. Wilkerson, Rajeev Kumar Dokania, Sasikanth Manipatruni |
2023-11-28 |
| 11810608 |
Manganese or scandium doped multi-element non-linear polar material gain memory bit-cell |
Rajeev Kumar Dokania, Noriyuki Sato, Tanay Gosavi, Pratyush Pandey, Amrita Mathuriya +1 more |
2023-11-07 |
| 11791233 |
Ferroelectric or paraelectric memory and logic chiplet with thermal management in a multi-dimensional packaging |
Amrita Mathuriya, Christopher B. Wilkerson, Rajeev Kumar Dokania, Sasikanth Manipatruni |
2023-10-17 |
| 11784164 |
3D stacked compute and memory with copper-to-copper hybrid bond |
Rajeev Kumar Dokania, Sasikanth Manipatruni, Amrita Mathuriya |
2023-10-10 |
| 11741428 |
Iterative monetization of process development of non-linear polar material and devices |
Sasikanth Manipatruni, Niloy Mukherjee, Noriyuki Sato, Tanay Gosavi, Somilkumar J. Rathi +3 more |
2023-08-29 |
| 11699699 |
Multi-function threshold gate with adaptive threshold and stacked planar ferroelectric capacitors |
Amrita Mathuriya, Rafael Rios, Ikenna Odinaka, Rajeev Kumar Dokania, Sasikanth Manipatruni |
2023-07-11 |
| 11694940 |
3D stack of accelerator die and multi-core processor die |
Amrita Mathuriya, Christopher B. Wilkerson, Rajeev Kumar Dokania, Sasikanth Manipatruni |
2023-07-04 |
| 11664371 |
Multi-function threshold gate with adaptive threshold and stacked planar paraelectric capacitors |
Amrita Mathuriya, Rafael Rios, Ikenna Odinaka, Rajeev Kumar Dokania, Sasikanth Manipatruni |
2023-05-30 |
| 11605411 |
Method of forming stacked ferroelectric planar capacitors in a memory bit-cell |
Rajeev Kumar Dokania, Noriyuki Sato, Tanay Gosavi, Pratyush Pandey, Amrita Mathuriya +1 more |
2023-03-14 |
| 11545204 |
Non-linear polar material based memory bit-cell with multi-level storage by applying different voltage levels |
Rajeev Kumar Dokania, Noriyuki Sato, Tanay Gosavi, Pratyush Pandey, Amrita Mathuriya +1 more |
2023-01-03 |