Issued Patents 2022
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11502121 | Image sensor device | Szu-Ying Chen, Jen-Cheng Liu, Feng-Chi Hung, Dun-Nian Yaung | 2022-11-15 |
| 11456176 | Gate electrodes with notches and methods for forming the same | Szu-Ying Chen, Dun-Nian Yaung, Jen-Cheng Liu, Tzu-Hsuan Hsu, Feng-Chi Hung | 2022-09-27 |
| 11424228 | Semiconductor structure and method for manufacturing the same | Dun-Nian Yaung, Jen-Cheng Liu, Hsing-Chih Lin, Ching-Chun Wang | 2022-08-23 |
| 11410972 | Hybrid bonding technology for stacking integrated circuits | Kuo-Ming Wu, Ching-Chun Wang, Dun-Nian Yaung, Hsing-Chih Lin, Jen-Cheng Liu +3 more | 2022-08-09 |
| 11404534 | Backside capacitor techniques | Dun-Nian Yaung, Hsing-Chih Lin, Jen-Cheng Liu | 2022-08-02 |
| 11387167 | Semiconductor structure and manufacturing method for the same | Dun-Nian Yaung, Jen-Cheng Liu, Ching-Chun Wang, Kuan-Chieh Huang, Hsing-Chih Lin +1 more | 2022-07-12 |
| 11322481 | Hybrid bonding technology for stacking integrated circuits | Kuo-Ming Wu, Ching-Chun Wang, Dun-Nian Yaung, Hsing-Chih Lin, Jen-Cheng Liu +3 more | 2022-05-03 |
| 11289455 | Backside contact to improve thermal dissipation away from semiconductor devices | Dun-Nian Yaung, Hsing-Chih Lin, Jen-Cheng Liu, Yi-Shin Chu, Ping-Tzu Chen +1 more | 2022-03-29 |
| 11282769 | Oversized via as through-substrate-via (TSV) stop layer | Dun-Nian Yaung, Hsing-Chih Lin, Jen-Cheng Liu, Yi-Shin Chu, Ping-Tzu Chen | 2022-03-22 |
| 11244925 | Semiconductor device structure with back-side layer to reduce leakage | Dun-Nian Yaung, Jen-Cheng Liu, Jeng-Shyan Lin, Hsun-Ying Huang | 2022-02-08 |
| 11222814 | Integrated circuit (IC) structure for high performance and functional density | Dun-Nian Yaung, Hsing-Chih Lin, Jen-Cheng Liu, Kuan-Chieh Huang | 2022-01-11 |
| 11217478 | Integrated circuit (IC) structure for high performance and functional density | Dun-Nian Yaung, Hsing-Chih Lin, Jen-Cheng Liu, Kuan-Chieh Huang | 2022-01-04 |