Issued Patents 2022
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11532698 | Diffusion barrier layer in top electrode to increase break down voltage | Hsing-Lien Lin, Chii-Ming Wu, Fa-Shen Jiang | 2022-12-20 |
| 11532511 | Method for forming semiconductor structure | Gung-Pei Chang, Yao-Wen Chang | 2022-12-20 |
| 11527717 | Resistive memory cell having a low forming voltage | Chii-Ming Wu, Hsing-Lien Lin, Tzu-Chung Tsai, Fa-Shen Jiang, Bi-Shen Lee | 2022-12-13 |
| 11527713 | Top electrode via with low contact resistance | Bi-Shen Lee, Hsun-Chung Kuang, Tzu-Chung Tsai, Yao-Wen Chang | 2022-12-13 |
| 11479849 | Physical vapor deposition chamber with target surface morphology monitor | Chii-Ming Wu, Shing-Chyang Pan | 2022-10-25 |
| 11482668 | RRAM structure | Chii-Ming Wu, Hsing-Lien Lin, Fa-Shen Jiang | 2022-10-25 |
| 11476416 | Semiconductor device and method for manufacturing the same | Fa-Shen Jiang, Hsing-Lien Lin, Chii-Ming Wu | 2022-10-18 |
| 11437573 | Semiconductor device and method for manufacturing the same | Hsing-Lien Lin, Fa-Shen Jiang | 2022-09-06 |
| 11430951 | Resistive memory cell with switching layer comprising one or more dopants | Fa-Shen Jiang, Cheng-Yuan Tsai, Hsing-Lien Lin, Hsun-Chung Kuang, Bi-Shen Lee | 2022-08-30 |
| 11404638 | Multi-doped data storage structure configured to improve resistive memory cell performance | Bi-Shen Lee, Fa-Shen Jiang, Hsun-Chung Kuang | 2022-08-02 |
| 11362271 | Switching layer scheme to enhance RRAM performance | Cheng-Yuan Tsai, Hsing-Lien Lin, Wen-Ting Chu | 2022-06-14 |
| 11309491 | Data storage structure for improving memory cell reliability | Chii-Ming Wu, Cheng-Yuan Tsai, Tzu-Chung Tsai, Fa-Shen Jiang | 2022-04-19 |
| 11309492 | Multi-layer structure to increase crystalline temperature of a selector device | — | 2022-04-19 |