Issued Patents 2022
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11482493 | Methods for reducing dual damascene distortion | Chao-Chun Wang, Po-Cheng Shih | 2022-10-25 |
| 11393711 | Silicon oxide layer for oxidation resistance and method forming same | Wan-Yi Kao | 2022-07-19 |
| 11373947 | Methods of forming interconnect structures of semiconductor device | Chia-Cheng Chou, Tze-Liang Lee | 2022-06-28 |
| 11355339 | Forming nitrogen-containing layers as oxidation blocking layers | Wan-Yi Kao | 2022-06-07 |
| 11328952 | Interconnect structure and method | Chia-Cheng Chou, Chih-Chien Chi, Yao-Jen Chang, Chen-Yuan Kao, Kai-Shiang Kuo +3 more | 2022-05-10 |
| 11329141 | Spacer structure with high plasma resistance for semiconductor devices | Wan-Yi Kao | 2022-05-10 |
| 11322412 | Forming nitrogen-containing low-K gate spacer | Wan-Yi Kao | 2022-05-03 |
| 11295948 | Low-K feature formation processes and structures formed thereby | Wan-Yi Kao, Li Chun Te, Hsiang-Wei Lin, Te-En Cheng, Wei-Ken Lin +2 more | 2022-04-05 |
| 11282712 | Method for preventing bottom layer wrinkling in a semiconductor device | Jung-Hau Shiu, Tze-Liang Lee, Yu-Yun Peng | 2022-03-22 |
| 11282749 | Forming nitrogen-containing low-k gate spacer | Wan-Yi Kao | 2022-03-22 |
| 11244823 | Varying temperature anneal for film and structures formed thereby | Shu Ling Liao, Wan-Yi Kao | 2022-02-08 |