| 11163571 |
Fusion to enhance early address generation of load instructions in a microprocessor |
Brian D. Barrick, Sheldon B. Levenstein, Phillip G. Williams, Niels Fricke, Dung Q. Nguyen +2 more |
2021-11-02 |
| 11150907 |
Parallel slice processor having a recirculating load-store queue for fast deallocation of issue queue entries |
Salma Ayub, Robert A. Cordes, David A. Hrusecky, Hung Q. Le, Dung Q. Nguyen +1 more |
2021-10-19 |
| 11150909 |
Energy efficient source operand issue |
Jeffrey C. Brownscheidle, Maureen A. Delaney, Dung Q. Nguyen |
2021-10-19 |
| 11138050 |
Operation of a multi-slice processor implementing a hardware level transfer of an execution thread |
Brian D. Barrick, James Wilson Bishop, Marcy E. Byers, Cliff Kucharski, Dung Q. Nguyen +2 more |
2021-10-05 |
| 10983797 |
Program instruction scheduling |
Christian Zoellin, Phillip G. Williams, Brian W. Thompto, Dung Q. Nguyen, Hung Q. Le +3 more |
2021-04-20 |
| 10942745 |
Fast multi-width instruction issue in parallel slice processor |
Salma Ayub, Jeffrey C. Brownscheidle, Dung Q. Nguyen, Tu-An T. Nguyen, Salim A. Shah +1 more |
2021-03-09 |
| 10909034 |
Issue queue snooping for asynchronous flush and restore of distributed history buffer |
David R. Terry, Dung Q. Nguyen, Brian W. Thompto, Joshua W. Bowman, Steven J. Battle +2 more |
2021-02-02 |
| 10884742 |
Handling unaligned load operations in a multi-slice computer processor |
Robert A. Cordes, David A. Hrusecky, Hung Q. Le, Jentje Leenstra, Dung Q. Nguyen +2 more |
2021-01-05 |