| 11056203 |
Boosted bitlines for storage cell programmed state verification in a memory array |
Xiang Yang, Pranav Kalavade, Shantanu R. Rajwade, Sagar Upadhyay |
2021-07-06 |
| 11043451 |
Electrical fuse and/or resistor structures |
Veeraraghavan S. Basker, Kangguo Cheng, Juntao Li |
2021-06-22 |
| 11004524 |
SSD having a parallelized, multi-level program voltage verification |
Xiang Yang, Shantanu R. Rajwade, Tarek Ahmed Ameen Beshari |
2021-05-11 |
| 10942799 |
Defective bit line management in connection with a memory access |
Pranav Kalavade, Ravi H. Motwani, Chang Wan Ha |
2021-03-09 |
| 10937863 |
Fabrication of perfectly symmetric gate-all-around FET on suspended nanowire using interface interaction |
Kangguo Cheng, Pouya Hashemi, Alexander Reznicek |
2021-03-02 |
| 10923622 |
Micro light-emitting diode (LED) elements and display |
Khaled Ahmed, Anup Pancholi |
2021-02-16 |
| 10903208 |
Distributed decoupling capacitor |
Kangguo Cheng, Darsen D. Lu, Ghavam G. Shahidi |
2021-01-26 |
| 10896976 |
Embedded source/drain structure for tall FinFet and method of formation |
Veeraraghavan S. Basker, Kangguo Cheng, Henry K. Utomo, Reinaldo Vega |
2021-01-19 |
| 10892364 |
Dielectric isolated fin with improved fin profile |
Kangguo Cheng, Bruce B. Doris, Darsen D. Lu, Kern Rim |
2021-01-12 |
| 10886385 |
Semiconductor structures having increased channel strain using fin release in gate regions |
Kangguo Cheng, Bruce B. Doris, Darsen D. Lu, Alexander Reznicek, Kern Rim |
2021-01-05 |
