Issued Patents 2020
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10871518 | Systems and methods for determining systematic defects | Yun-Han Lee, Ankita Patidar | 2020-12-22 |
| 10867098 | System and method for ESL modeling of machine learning | Kai-Yuan Ting, Tze-Chiang Huang, Yun-Han Lee | 2020-12-15 |
| 10867089 | Electrical system level (ESL) battery discharge simulation | Charlie Zhou, Kai-Yuan Ting, Tze-Chiang Huang, Yun-Han Lee | 2020-12-15 |
| 10782318 | Test probing structure | Mill-Jer Wang, Ching-Fang Chen, Chung-Sheng Yuan, Chao-Yang Yeh, Chin-Chou Liu +2 more | 2020-09-22 |
| 10776538 | Function safety and fault management modeling at electrical system level (ESL) | Kai-Yuan Ting, Yun-Han Lee, Mei Hsu Wong, Hsin-Cheng Chen | 2020-09-15 |
| 10719648 | System and method for system-level parameter estimation | Tze-Chiang Huang, Kai-Yuan Ting, Yun-Han Lee, Shereef Shehata, Mei Hsu Wong | 2020-07-21 |
| 10685157 | Power-aware scan partitioning | Ankita Patidar, Yun-Han Lee | 2020-06-16 |
| 10680627 | Phase-locked loop monitor circuit | Ji-Jan Chen, Stanley John, Yun-Han Lee, Yen-Hao Huang | 2020-06-09 |
| 10666578 | Network-on-chip system and a method of generating the same | Ravi Venugopalan, Yun-Han Lee | 2020-05-26 |
| 10539617 | Scan architecture for interconnect testing in 3D integrated circuits | Yun-Han Lee, Saman M. I. Adham, Marat Gershoig | 2020-01-21 |