Issued Patents 2020
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10539617 | Scan architecture for interconnect testing in 3D integrated circuits | Sandeep Kumar Goel, Yun-Han Lee, Saman M. I. Adham | 2020-01-21 |
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10539617 | Scan architecture for interconnect testing in 3D integrated circuits | Sandeep Kumar Goel, Yun-Han Lee, Saman M. I. Adham | 2020-01-21 |