Issued Patents 2020
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10879629 | Method of electroplating metal into recessed feature and electroplating layer in recessed feature | Jun-Nan Nian, Jyun-Ru Wu, Shiu-Ko JangJian, Yu-Ren PENG, Chi-Cheng Hung | 2020-12-29 |
| 10867845 | Semiconductor device and method | Chi-Cheng Hung, Ching-Hwanq Su, Liang-Yueh Ou Yang, Ming-Hsing Tsai, Yu-Ting Lin | 2020-12-15 |
| 10840184 | Formation of copper layer structure with self anneal strain improvement | Jun-Nan Nian, Shiu-Ko JangJian, Chi-Cheng Hung, Hung-Hsu Chen | 2020-11-17 |
| 10840330 | Block layer in the metal gate of MOS devices | Jung-Chih Tsao, Chi-Cheng Hung, Wen-Hsi Lee, Kei-Wei Chen, Ying-Lang Wang | 2020-11-17 |
| 10833196 | FinFET structures and methods of forming the same | Chi-Cheng Hung, Chia-Ching Lee, Chung-Chiang Wu, Ching-Hwanq Su | 2020-11-10 |
| 10804161 | CMOS FinFET structures including work-function materials having different proportions of crystalline orientations and methods of forming the same | Ya-Wen Chiu, Da-Yuan Lee, Hsien-Ming Lee, Kai-Cyuan Yang, Chih-Hsiang Fan +1 more | 2020-10-13 |
| 10755938 | Metal gate and manufacturing method thereof | Chi-Cheng Hung, Ting-Siang Su, Ching-Hwanq Su | 2020-08-25 |
| 10749278 | Method of electroplating metal into recessed feature and electroplating layer in recessed feature | Jun-Nan Nian, Jyun-Ru Wu, Shiu-Ko JangJian, Yu-Ren PENG, Chi-Cheng Hung | 2020-08-18 |
| 10714329 | Pre-clean for contacts | Yu-Ting Lin, Chen-Yuan Kao, Rueijer Lin, I-Li Chen, Hong-Ming Wu | 2020-07-14 |
| 10714576 | Semiconductor device and method for manufacturing the same | Chi-Cheng Hung, Kei-Wei Chen, Ming-Ching CHUNG, Chia-Yang Wu | 2020-07-14 |