SS

Soon-Cheon Seo

IBM: 25 patents #115 of 11,274Top 2%
ET Elpis Technologies: 2 patents #7 of 95Top 8%
TE Tessera: 1 patents #44 of 99Top 45%
Overall (2020): #984 of 565,922Top 1%
28
Patents 2020

Issued Patents 2020

Showing 1–25 of 28 patents

Patent #TitleCo-InventorsDate
10879390 Boosted vertical field-effect transistor Injo Ok, Choonghyun Lee, Seyoung Kim 2020-12-29
10840052 Planar gate-insulated vacuum channel transistor Injo Ok, Choonghyun Lee, Seyoung Kim 2020-11-17
10833168 Complementary metal-oxide-semiconductor (CMOS) nanosheet devices with epitaxial source/drains and replacement metal gate structures Injo Ok, Choonghyun Lee 2020-11-10
10832941 Airgap isolation for backend embedded memory stack pillar arrays Injo Ok, Alexander Reznicek, Choonghyun Lee 2020-11-10
10818753 VTFET having a V-shaped groove at the top junction region Choonghyun Lee, Alexander Reznicek, Injo Ok 2020-10-27
10804159 Minimize middle-of-line contact line shorts Injo Ok, Balasubramanian Pranatharthiharan, Charan V. Surisetty 2020-10-13
10804380 Fin and shallow trench isolation replacement to prevent gate collapse 2020-10-13
10804165 Source and drain isolation for CMOS nanosheet with one block mask Choonghyun Lee, Injo Ok 2020-10-13
10790284 Spacer for trench epitaxial structures Injo Ok, Balasubramanian Pranatharthiharan, Charan V. V. S. Surisetty 2020-09-29
10777679 Removal of work function metal wing to improve device yield in vertical FETs Choonghyun Lee, Injo Ok, Alexander Reznicek 2020-09-15
10777648 Vertical fin-type bipolar junction transistor with self-aligned base contact Choonghyun Lee, Seyoung Kim, Injo Ok 2020-09-15
10763431 Film stress control for memory device stack Injo Ok, Choonghyun Lee, Chih-Chao Yang, Seyoung Kim 2020-09-01
10763326 Middle-of-line (MOL) capacitance reduction for self-aligned contact in gate stack Injo Ok, Balasubramanian Pranatharthiharan, Charan V. V. S. Surisetty 2020-09-01
10748962 Method and structure for forming MRAM device Seyoung Kim, Injo Ok, Choonghyun Lee, Kisup Chung 2020-08-18
10741559 Spacer for trench epitaxial structures Injo Ok, Balasubramanian Pranatharthiharan, Charan V. V. S. Surisetty 2020-08-11
10734490 Bipolar junction transistor (BJT) with 3D wrap around emitter Choonghyun Lee, Injo Ok, Shogo Mochizuki 2020-08-04
10707332 FinFET with epitaxial source and drain regions and dielectric isolated channel region Kangguo Cheng, Ramachandra Divakaruni, Ali Khakifirooz, Alexander Reznicek 2020-07-07
10693059 MTJ stack etch using IBE to achieve vertical profile Kisup Chung, Injo Ok, Seyoung Kim, Choonghyun Lee 2020-06-23
10672643 Reducing off-state leakage current in Si/SiGe dual channel CMOS Injo Ok, Choonghyun Lee, Seyoung Kim 2020-06-02
10672872 Self-aligned base contacts for vertical fin-type bipolar junction transistors Choonghyun Lee, Injo Ok, Seyoung Kim 2020-06-02
10658495 Vertical fin type bipolar junction transistor (BJT) device with a self-aligned base contact Injo Ok, Choonghyun Lee, Sungjae Lee 2020-05-19
10622259 Semiconductor devices with sidewall spacers of equal thickness Kangguo Cheng, Balasubramanian Pranatharthiharan 2020-04-14
10608114 Vertical nano-wire complimentary metal-oxide-semiconductor transistor with cylindrical III-V compound and germanium channel Injo Ok, Choonghyun Lee 2020-03-31
10600606 Vertical vacuum channel transistor with minimized air gap between tip and gate Injo Ok, Choonghyun Lee, Seyoung Kim 2020-03-24
10593771 Vertical fin-type bipolar junction transistor with self-aligned base contact Choonghyun Lee, Seyoung Kim, Injo Ok 2020-03-17