JZ

Jingyun Zhang

IBM: 40 patents #51 of 11,274Top 1%
📍 Albany, NY: #2 of 171 inventorsTop 2%
🗺 New York: #27 of 13,306 inventorsTop 1%
Overall (2020): #476 of 565,922Top 1%
40
Patents 2020

Issued Patents 2020

Showing 26–40 of 40 patents

Patent #TitleCo-InventorsDate
10600883 Vertical transport FETs having a gradient threshold voltage Choonghyun Lee, Takashi Ando, Pouya Hashemi, Alexander Reznicek 2020-03-24
10593673 Nanosheet with single epitaxial stack forming off-set dual material channels for gate-all-around CMOS Xin Miao, Alexander Reznicek, Choonghyun Lee 2020-03-17
10586872 Formation of wrap-around-contact to reduce contact resistivity Adra Carr, Choonghyun Lee, Takashi Ando, Pouya Hashemi 2020-03-10
10580703 Multivalent oxide cap for multiple work function gate stacks on high mobility channel materials Takashi Ando, Choonghyun Lee, Pouya Hashemi 2020-03-03
10573723 Vertical transport FETs with asymmetric channel profiles using dipole layers Takashi Ando, Choonghyun Lee, Sanghoon Shin, Pouya Hashemi, Alexander Reznicek 2020-02-25
10566435 Gate stack quality for gate-all-around field-effect transistors Takashi Ando, Choonghyun Lee 2020-02-18
10559692 Nanosheet substrate isolation scheme by lattice matched wide bandgap semiconductor Alexander Reznicek, Xin Miao, Choonghyun Lee 2020-02-11
10559676 Vertical FET with differential top spacer Takashi Ando, Choonghyun Lee, Pouya Hashemi 2020-02-11
10553679 Formation of self-limited inner spacer for gate-all-around nanosheet FET Takashi Ando, Choonghyun Lee, Alexander Reznicek, Pouya Hashemi 2020-02-04
10553696 Full air-gap spacers for gate-all-around nanosheet field effect transistors Takashi Ando, Pouya Hashemi, Choonghyun Lee, Alexander Reznicek 2020-02-04
10553678 Vertically stacked dual channel nanosheet devices Choonghyun Lee, Pouya Hashemi, Takashi Ando, Alexander Reznicek 2020-02-04
10546925 Vertically stacked nFET and pFET with dual work function Alexander Reznicek, Takashi Ando, Choonghyun Lee, Pouya Hashemi 2020-01-28
10541239 Semiconductor device and method of forming the semiconductor device Robin Hsin Kuo Chao, Hemanth Jagannathan, Choonghyun Lee, Chun Wing Yeung 2020-01-21
10529850 Vertical field-effect transistor including a fin having sidewalls with a tapered bottom profile Chun Wing Yeung, Choonghyun Lee, Robin Hsin Kuo Chao, Heng Wu 2020-01-07
10529716 Asymmetric threshold voltage VTFET with intrinsic dual channel epitaxy Choonghyun Lee, Takashi Ando, Alexander Reznicek, Pouya Hashemi 2020-01-07