Issued Patents 2019
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10521811 | Optimizing allocation of configuration elements | Veerendra Kumar Rai, Sanjit Mehta, Praveen Chandak, Rutuja Maruti Patil, Abhinary Puvvala | 2019-12-31 |
| 10522679 | Selective shallow trench isolation (STI) fill for stress engineering in semiconductor structures | Hong Yu, Xinyuan Dou, Xusheng Wu, Dongil Choi, Edmund K. Banghart +1 more | 2019-12-31 |
| 10421929 | Low-VOC cleaning substrates comprising a quat and ethoxylated/propdxylated fatty alcohol | Sarah Coulter, Diana Mitchell, William Ouellette, Gregory VanBuskirk | 2019-09-24 |
| 10396206 | Gate cut method | Haiting Wang, Wei Hong, Wei Zhao, Tae Jeong LEE, Zhenyu Hu | 2019-08-27 |
| 10358624 | Low-VOC cleaning substrates and compositions | Diana Mitchell, Sarah Coulter, William Ouellette, Gregory van Buskirk | 2019-07-23 |
| 10358623 | Low-voc cleaning substrates and compositions comprising a mixed ethoxy/propoxy alcohol or fatty acid | Diana Mitchell, Sarah Coulter, William Ouellette, Gregory van Buskirk | 2019-07-23 |
| 10255072 | Architectural register replacement for instructions that use multiple architectural registers | Mark J. Charney, Robert Valentine, Milind B. Girkar, Bret L. Toll, Elmoustapha Ould-Ahmed-Vall +2 more | 2019-04-09 |
| 10192746 | STI inner spacer to mitigate SDB loading | Hui Zhan, Hong Yu, Zhenyu Hu, Haiting Wang, Edward Reis +1 more | 2019-01-29 |
| 10180838 | Multi-register gather instruction | — | 2019-01-15 |