Issued Patents 2019
Showing 51–75 of 106 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10347537 | Forming insulator fin structure in isolation region to support gate structures | Kangguo Cheng | 2019-07-09 |
| 10347731 | Transistor with asymmetric spacers | Zhenxing Bi, Kangguo Cheng, Heng Wu | 2019-07-09 |
| 10347743 | Vertical transport fin field effect transistor (VT FinFET) having an uniform L-shaped inner spacer | Kangguo Cheng, Juntao Li, Jingyun Zhang | 2019-07-09 |
| 10347744 | Method and structure of forming FinFET contact | Kangguo Cheng | 2019-07-09 |
| 10332799 | Vertical silicon/silicon-germanium transistors with multiple threshold voltages | Zhenxing Bi, Kangguo Cheng, Juntao Li | 2019-06-25 |
| 10332999 | Method and structure of forming fin field-effect transistor without strain relaxation | Kangguo Cheng, Juntao Li, Choonghyun Lee, Heng Wu | 2019-06-25 |
| 10332995 | Reduced resistance source and drain extensions in vertical field effect transistors | Chun Wing Yeung, Chen Zhang | 2019-06-25 |
| 10332986 | Formation of inner spacer on nanosheet MOSFET | Zhenxing Bi, Kangguo Cheng, Juntao Li | 2019-06-25 |
| 10332983 | Vertical field-effect transistors including uniform gate lengths | Kangguo Cheng, Choonghyun Lee, Juntao Li, Heng Wu | 2019-06-25 |
| 10332880 | Vertical fin resistor devices | Zhenxing Bi, Kangguo Cheng | 2019-06-25 |
| 10332802 | Hybrid-channel nano-sheets FETs | Zhenxing Bi, Kangguo Cheng, Wenyu Xu | 2019-06-25 |
| 10326022 | Self-aligned gate cut with polysilicon liner oxidation | Kangguo Cheng | 2019-06-18 |
| 10325817 | Semiconductor fin patterning techniques to achieve uniform fin profiles for fin field effect transistors | Zhenxing Bi, Kangguo Cheng, Juntao Li | 2019-06-18 |
| 10319717 | Forming on-chip metal-insulator-semiconductor capacitor with pillars | Zhenxing Bi, Kangguo Cheng, Chen Zhang | 2019-06-11 |
| 10319813 | Nanosheet CMOS transistors | Zhenxing Bi, Kangguo Cheng, Juntao Li | 2019-06-11 |
| 10319638 | Self-aligned contact cap | Kangguo Cheng | 2019-06-11 |
| 10312132 | Forming sacrificial endpoint layer for deep STI recess | Kangguo Cheng, Juntao Li, Sebastian Naczas | 2019-06-04 |
| 10312370 | Forming a sacrificial liner for dual channel devices | Huiming Bu, Kangguo Cheng, Dechao Guo, Sivananda K. Kanakasabapathy | 2019-06-04 |
| 10312325 | Techniques for forming finFET transistors with same fin pitch and different source/drain epitaxy configurations | Kangguo Cheng | 2019-06-04 |
| 10312245 | Laser spike annealing for solid phase epitaxy and low contact resistance in an SRAM with a shared pFET and nFET trench | Zuoguang Liu, Gen Tsutsui, Heng Wu | 2019-06-04 |
| 10312148 | Method and structure for forming MOSFET with reduced parasitic capacitance | Kangguo Cheng, Chen Zhang | 2019-06-04 |
| 10304742 | Forming insulator fin structure in isolation region to support gate structures | Kangguo Cheng | 2019-05-28 |
| 10297667 | Fin field-effect transistor for input/output device integrated with nanosheet field-effect transistor | Chun Wing Yeung, Chen Zhang, Huiming Bu, Kangguo Cheng | 2019-05-21 |
| 10290383 | Deposition of integrated protective material into zirconium cladding for nuclear reactors by high-velocity thermal application | Jason P. Mazzoccoli, Edward J. Lahoda | 2019-05-14 |
| 10283565 | Resistive memory with a plurality of resistive random access memory cells each comprising a transistor and a resistive element | Kangguo Cheng, Juntao Li, Choonghyun Lee | 2019-05-07 |