PT

Po-Hao Tsai

TSMC: 17 patents #62 of 2,832Top 3%
📍 Houliao, TW: #1 of 6 inventorsTop 20%
Overall (2017): #2,224 of 506,227Top 1%
17
Patents 2017

Issued Patents 2017

Showing 1–17 of 17 patents

Patent #TitleCo-InventorsDate
9842826 Semiconductor device and method of manufacture Jing-Cheng Lin, Chen-Hua Yu 2017-12-12
9818697 Semiconductor package manufacturing method Jing-Cheng Lin, Ying-Ching Shih, Szu-Wei Lu 2017-11-14
9799581 Integrated fan-out structure with openings in buffer layer Wu Sen Chiu, Li-Hui Cheng, Jing-Cheng Lin 2017-10-24
9773724 Semiconductor devices, methods of manufacture thereof, and semiconductor device packages I-Ting Chen, Ying-Ching Shih, Szu-Wei Lu, Jing-Cheng Lin 2017-09-26
9761566 Multi-die structure and method of forming same Chen-Hua Yu, Jing-Cheng Lin, Li-Hui Cheng 2017-09-12
9728496 Packaged semiconductor devices and packaging devices and methods Jing-Cheng Lin 2017-08-08
9728508 Semiconductor device and method of manufacture Jing-Cheng Lin, Chen-Hua Yu 2017-08-08
9698135 Mechanisms for forming package structure Jing-Cheng Lin 2017-07-04
9673181 Package on package (PoP) bonding structures Jing-Cheng Lin, Jui-Pin Hung 2017-06-06
9646942 Mechanisms for controlling bump height variation Jing-Cheng Lin 2017-05-09
9646918 Semiconductor device and method Li-Hui Cheng, Jing-Cheng Lin 2017-05-09
9633934 Semicondutor device and method of manufacture Jing-Cheng Lin, Li-Hui Cheng, Porter Chen 2017-04-25
9633895 Integrated fan-out structure with guiding trenches in buffer layer Feng-Cheng Hsu, Li-Hui Cheng, Jui-Pin Hung, Jing-Cheng Lin 2017-04-25
9583420 Semiconductor device and method of manufactures Jing-Cheng Lin, Li-Hui Cheng 2017-02-28
9570401 Packaged semiconductor devices, methods of packaging semiconductor devices, and PoP devices Jui-Pin Hung, Jing-Cheng Lin 2017-02-14
9553059 Backside redistribution layer (RDL) structure Jing-Cheng Lin 2017-01-24
9543170 Semiconductor packages and methods of forming the same Chen-Hua Yu, Jing-Cheng Lin 2017-01-10