Issued Patents 2017
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9761513 | Method of fabricating three dimensional integrated circuit | Kuo-Chung Yee | 2017-09-12 |
| 9679882 | Method of multi-chip wafer level packaging | Chih-Hang Tung, Chen-Hua Yu, Da-Yuan Shih | 2017-06-13 |
| 9583365 | Method of forming interconnects for three dimensional integrated circuit | Kuo-Chung Yee, Chen-Hua Yu, Yeong-Jyh Lin, Chia-Hsiang Lin, Liang-Ju Yen +1 more | 2017-02-28 |