Issued Patents 2017
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9824975 | Semiconductor device and method of forming stepped interconnect layer for stacked semiconductor die | Reza A. Pagaila, Byung Tai Do | 2017-11-21 |
| 9799589 | Integrated circuit packaging system with a grid array with a leadframe and method of manufacture thereof | Byung Tai Do, Arnel Senosa Trasporto | 2017-10-24 |
| 9754897 | Semiconductor device and method of forming electromagnetic (EM) shielding for LC circuits | Yaojian Lin, Byung Joon Han, Rajendra D. Pendse, Il Kwon Shim, Pandi C. Marimuthu +1 more | 2017-09-05 |
| 9679881 | Semiconductor device and method of forming cavity adjacent to sensitive region of semiconductor die using wafer-level underfill material | Reza A. Pagaila, Byung Tai Do | 2017-06-13 |
| 9620480 | Integrated circuit packaging system with unplated leadframe and method of manufacture thereof | Garret Dimaculangan, Byung Tai Do, Arnel Senosa Trasporto | 2017-04-11 |
| 9576873 | Integrated circuit packaging system with routable trace and method of manufacture thereof | Byung Tai Do, Arnel Senosa Trasporto | 2017-02-21 |