Issued Patents 2017
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9824975 | Semiconductor device and method of forming stepped interconnect layer for stacked semiconductor die | Byung Tai Do, Linda Pei Ee Chua | 2017-11-21 |
| 9754858 | Semiconductor device and method of forming TSV semiconductor wafer with embedded semiconductor die | Yaojian Lin, Seung Uk Yoon | 2017-09-05 |
| 9685403 | Semiconductor device and method of forming shielding layer over semiconductor die mounted to TSV interposer | — | 2017-06-20 |
| 9679824 | Semiconductor device and method of forming bond-on-lead interconnection for mounting semiconductor die in Fo-WLCSP | Rajendra D. Pendse, Jun Mo Koo | 2017-06-13 |
| 9679881 | Semiconductor device and method of forming cavity adjacent to sensitive region of semiconductor die using wafer-level underfill material | Byung Tai Do, Linda Pei Ee Chua | 2017-06-13 |
| 9640504 | Semiconductor device and method of providing z-interconnect conductive pillars with inner polymer core | Byung Tai Do, Shuangwu Huang | 2017-05-02 |
| 9620455 | Semiconductor device and method of forming anisotropic conductive film between semiconductor die and build-up interconnect structure | Yaojian Lin, Jun Mo Koo | 2017-04-11 |
| 9601369 | Semiconductor device and method of forming conductive vias with trench in saw street | Byung Tai Do | 2017-03-21 |
| 9589910 | Semiconductor device and method of forming base leads from base substrate as standoff for stacking semiconductor die | Dioscoro A. Merilo | 2017-03-07 |
| 9583446 | Semiconductor device and method of forming a shielding layer between stacked semiconductor die | Byung Tai Do, Nathapong Suthiwongsunthorn | 2017-02-28 |