Issued Patents 2016
Showing 1–25 of 60 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9530665 | Protective trench layer and gate spacer in finFET devices | Richard S. Wise | 2016-12-27 |
| 9525069 | Structure and method to form a FinFET device | Andres Bryant, Jeffrey B. Johnson, Tenko Yamashita | 2016-12-20 |
| 9515090 | Method to form dual channel group III-V and Si/Ge FINFET CMOS and integrated circuit fabricated using the method | Daniele Caimi, Lukas Czornomaz, Jean Fompeyrine | 2016-12-06 |
| 9515070 | Replacement metal gate | David V. Horak, Stefan Schmitz, Junli Wang | 2016-12-06 |
| 9515165 | III-V field effect transistor (FET) with reduced short channel leakage, integrated circuit (IC) chip and method of manufacture | Cheng-Wei Cheng, Pranita Kerber, Amlan Majumdar | 2016-12-06 |
| 9508833 | Punch through stopper for semiconductor device | Tenko Yamashita | 2016-11-29 |
| 9502500 | Forming multi-stack nanowires using a common release material | — | 2016-11-22 |
| 9502506 | Structure for FinFET fins | Tenko Yamashita | 2016-11-22 |
| 9496399 | FinFET devices with multiple channel lengths | Tenko Yamashita | 2016-11-15 |
| 9496447 | Signal distribution in integrated circuit using optical through silicon via | James D. Warnock, Dieter Wendel | 2016-11-15 |
| 9496379 | Method and structure for III-V FinFET | — | 2016-11-15 |
| 9484250 | Air gap contact formation for reducing parasitic capacitance | — | 2016-11-01 |
| 9478534 | Lateral BiCMOS replacement metal gate | Jin Cai, Tak H. Ning | 2016-10-25 |
| 9478708 | Embedded gallium—nitride in silicon | William J. Gallagher, Devendra K. Sadana, Ghavam G. Shahidi | 2016-10-25 |
| 9472651 | Spacerless fin device with reduced parasitic resistance and capacitance and method to fabricate same | — | 2016-10-18 |
| 9472654 | Forming low parasitic trim gate last MOSFET | — | 2016-10-18 |
| 9455347 | Mandrel removal last in lateral semiconductor growth and structure for same | — | 2016-09-27 |
| 9450381 | Monolithic integrated photonics with lateral bipolar and BiCMOS | Jin Cai, Ning Li, Tak H. Ning, Jean-Olivier Plouchart, Devendra K. Sadana | 2016-09-20 |
| 9437614 | Dual-semiconductor complementary metal-oxide-semiconductor device | Sanghoon Lee, Renee T. Mo, Yanning Sun | 2016-09-06 |
| 9431352 | Chip with shelf life | — | 2016-08-30 |
| 9423563 | Variable buried oxide thickness for a waveguide | Russell A. Budd, Ning Li, Jean-Olivier Plouchart, Devendra K. Sadana | 2016-08-23 |
| 9418846 | Selective dopant junction for a group III-V semiconductor device | Kevin K. Chan, Marinus Hopstaken, Young-Hee Kim, Masaharu Kobayashi, Deborah A. Neumayer +3 more | 2016-08-16 |
| 9419102 | Method to reduce parasitic gate capacitance and structure for same | — | 2016-08-16 |
| 9419091 | Trenched gate with sidewall airgap spacer | — | 2016-08-16 |
| 9412840 | Sacrificial layer for replacement metal semiconductor alloy contact formation | Tenko Yamashita | 2016-08-09 |