Issued Patents 2016
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9502558 | Local strain generation in an SOI substrate | Shay Reboh, Cyrille Le Royer, Sylvain Maitrejean, Yves Morand | 2016-11-22 |
| 9466664 | Uniaxially-strained FD-SOI finFET | Pierre Morin, Maud Vinet, Ajey Poovannummoottil Jacob | 2016-10-11 |
| 9437474 | Method for fabricating microelectronic devices with isolation trenches partially formed under active regions | Yannick Le Tiec, Nicolas Loubet, Maud Vinet, Romain Wacquez | 2016-09-06 |
| 9425051 | Method for producing a silicon-germanium film with variable germanium content | Maud Vinet, Yves Morand | 2016-08-23 |
| 9373507 | Defective P-N junction for backgated fully depleted silicon on insulator mosfet | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Yannick Le Tiec, Qing Liu +1 more | 2016-06-21 |
| 9337350 | Transistor with reduced parasitic capacitance and access resistance of the source and drain, and method of fabrication of the same | Nicolas Posseme, Yannick Le Tiec, Maud Vinet | 2016-05-10 |
| 9293474 | Dual channel hybrid semiconductor-on-insulator semiconductor devices | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Qing Liu, Yannick Le Tiec +1 more | 2016-03-22 |
| 9252208 | Uniaxially-strained FD-SOI finFET | Pierre Morin, Maud Vinet, Ajey Poovannummoottil Jacob | 2016-02-02 |
| 9236478 | Method for manufacturing a fin MOS transistor | Yves Morand, Romain Wacquez, Yannick Le Tiec, Maud Vinet | 2016-01-12 |
| 9231062 | Method for treating the surface of a silicon substrate | Yannick Le Tiec, Maud Vinet, Romain Wacquez | 2016-01-05 |