Issued Patents 2011
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8058151 | Methods of die sawing | Hao-Yi Tsai | 2011-11-15 |
| 8030776 | Integrated circuit with protective structure | Chen-Hua Yu, Shang-Yun Hou, Hao-Yi Tsai, Hsien-Wei Chen, Hsiu-Ping Wei | 2011-10-04 |
| 8013333 | Semiconductor test pad structures | Hsien-Wei Chen, Ying-Ju Chen, Yu-Wen Liu, Hao-Yi Tsai | 2011-09-06 |
| 7994046 | Method for forming a dielectric layer with an air gap, and a structure including the dielectric layer with the air gap | — | 2011-08-09 |
| 7952453 | Structure design for minimizing on-chip interconnect inductance | Hsien-Wei Chen, Hsueh-Chung Chen | 2011-05-31 |
| 7952167 | Scribe line layout design | Hsin-Hui Lee, Mirng-Ji Lii, Shang-Yun Hou | 2011-05-31 |
| 7936067 | Backend interconnect scheme with middle dielectric layer having improved strength | Hao-Yi Tsai, Yu-Wen Liu, Hsien-Wei Chen, Ying-Ju Chen | 2011-05-03 |
| 7906836 | Heat spreader structures in scribe lines | Hsien-Wei Chen, Yu-Wen Liu, Jyh-Cherng Sheu, Hao-Yi Tsai, Chen-Hua Yu +1 more | 2011-03-15 |
| 7880278 | Integrated circuit having stress tuning layer | Clinton Chao, Szu-Wei Lu | 2011-02-01 |