Issued Patents 2011
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8084825 | Trilayer resist scheme for gate etching applications | Nicholas C. M. Fuller, Timothy J. Dalton | 2011-12-27 |
| 8053809 | Device including high-K metal gate finfet and resistive structure and method of forming thereof | Kangguo Cheng, Bruce B. Doris | 2011-11-08 |
| 8021949 | Method and structure for forming finFETs with multiple doping regions on a same chip | Kangguo Cheng, Bruce B. Doris | 2011-09-20 |
| 8003455 | Implantation using a hardmask | Kangguo Cheng, Bruce B. Doris | 2011-08-23 |
| 7935637 | Resist stripping methods using backfilling material layer | Nicholas C. M. Fuller, Sivananda K. Kanakasabapathy | 2011-05-03 |
| 7928443 | Method and structure for forming strained SI for CMOS devices | An Steegen, Haining Yang | 2011-04-19 |
| 7923786 | Selective silicon-on-insulator isolation structure and method | An Steegen, Maheswaran Surendra, Hsing-Jen Wann, Franz Zach, Robert C. Wong | 2011-04-12 |
| 7923782 | Hybrid SOI/bulk semiconductor transistors | Huilong Zhu, Philip J. Oldiges, Bruce B. Doris, Xinlin Wang, Oleg Gluschenkov +1 more | 2011-04-12 |
| 7919379 | Dielectric spacer removal | Eduard A. Cartier, Rashmi Jha, Sivananda K. Kanakasabapathy, Xi Li, Renee T. Mo +6 more | 2011-04-05 |
| 7902620 | Suspended germanium photodetector for silicon waveguide | Solomon Assefa, Jack O. Chu, Martin M. Frank, William M. Green, Young-Hee Kim +3 more | 2011-03-08 |
| 7863124 | Residue free patterned layer formation method applicable to CMOS structures | Michael P. Chudzik, Bruce B. Doris, William K. Henson, Hongwen Yan | 2011-01-04 |