Issued Patents 2011
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8058646 | Programmable resistive memory cell with oxide layer | Michael Xuefei Tang, Insik Jin, Venkatram Venkatasamy, Philip G. Pitcher, Nurul Amin | 2011-11-15 |
| 8058960 | Chip scale power converter package having an inductor substrate | Francois Hebert | 2011-11-15 |
| 8053874 | Semiconductor package having a bridge plate connection | Lei Shi, Kai Liu | 2011-11-08 |
| 8049337 | Substrate and manufacturing method of package structure | Yun-Lung Chang | 2011-11-01 |
| 7999363 | Structure and method for self protection of power device | Francois Hebert | 2011-08-16 |
| 7974117 | Non-volatile memory cell with programmable unipolar switching element | Wei Tan, Nurul Amin, Insik Jim, Venu Vaithyanathan, YoungPil Kim +1 more | 2011-07-05 |
| 7955893 | Wafer level chip scale package and process of manufacture | Tao Feng, Francois Hebert, Yueh-Se Ho | 2011-06-07 |
| 7951651 | Dual flat non-leaded semiconductor package | Kai Liu, Xiaotian Zhang, Leeshawn Luo | 2011-05-31 |
| 7906375 | Compact co-packaged semiconductor dies with elevation-adaptive interconnection plates | Kai Liu | 2011-03-15 |
| 7902554 | Polysilicon film having smooth surface and method of forming the same | Chih-Wei Chao | 2011-03-08 |
| 7902010 | Mask for sequential lateral solidification (SLS) process and a method for crystallizing amorphous silicon by using the same | — | 2011-03-08 |
| 7897438 | Method of making semiconductor package with plated connection | Leeshawn Luo, Kai Liu, Xiao Zhang | 2011-03-01 |
| 7884469 | Semiconductor package having a bridged plate interconnection | Lei Shi, Kai Liu | 2011-02-08 |
| 7871907 | Mask and method of fabricating a polysilicon layer using the same | — | 2011-01-18 |
| 7868431 | Compact power semiconductor package and method with stacked inductor and integrated circuit die | Tao Feng, Xiaotian Zhang, Francois Hebert | 2011-01-11 |