Issued Patents 2004
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6818487 | Self-aligned, planarized thin-film transistors, devices employing the same, and methods of fabrication thereof | Louis L. Hsu, Jack A. Mandelman, Li-Kong Wang | 2004-11-16 |
| 6812122 | Method for forming a voltage programming element | Claude L. Bertin, Erik L. Hedberg, Russell J. Houghton, Max G. Levy, Rick L. Mohler +1 more | 2004-11-02 |
| 6802033 | Low-power critical error rate communications controller | Claude L. Bertin, Alvar A. Dean, Kenneth J. Goodnow, Scott Whitney Gould, Patrick E. Perry +1 more | 2004-10-05 |
| 6794726 | MOS antifuse with low post-program resistance | Carl Radens | 2004-09-21 |
| 6790722 | Logic SOI structure, process and application for vertical bipolar transistor | Ramachandra Divakaruni, Russell J. Houghton, Jack A. Mandelman, Wilbur D. Pricer | 2004-09-14 |
| 6770907 | Test structure and methodology for semiconductor stress-induced defects and antifuse based on same test structure | Wagdi W. Abadeer, Eric Adler, Jeffrey S. Brown, Robert J. Gauthier, Jr., Jonathan M. McKenna +2 more | 2004-08-03 |
| 6753590 | High impedance antifuse | John A. Fifield, Russell J. Houghton | 2004-06-22 |
| 6730552 | MOSFET with decoupled halo before extension | Wagdi W. Abadeer, Jeffrey S. Brown, Kiran V. Chatty, Robert J. Gauthier, Jr., Carl Radens | 2004-05-04 |
| 6724029 | Twin-cell flash memory structure and method | Louis L. Hsu, Chung H. Lam, Jack A. Mandelman, Carl Radens | 2004-04-20 |
| 6720213 | Low-K gate spacers by fluorine implantation | Jeffrey P. Gambino, Jack A. Mandelman | 2004-04-13 |
| 6700164 | Tungsten hot wire current limiter for ESD protection | Ciaran J. Brennan, Kevin A. Duncan, Steven H. Voldman | 2004-03-02 |
| 6693843 | Wordline on and off voltage compensation circuit based on the array device threshold voltage | Thomas M. Maffitt, Russell J. Houghton, Mark D. Jacunski, Kevin McStay | 2004-02-17 |
| 6674134 | Structure and method for dual gate oxidation for CMOS technology | Wayne S. Berry, Jeffrey P. Gambino, Jack A. Mandelman | 2004-01-06 |
| 6674139 | Inverse T-gate structure using damascene processing | Jack A. Mandelman, Carl Radens | 2004-01-06 |