Issued Patents 2004
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6826025 | Method and apparatus for providing ESD protection and/or noise reduction in an integrated circuit | Raminderpal Singh | 2004-11-30 |
| 6774017 | Method and structures for dual depth oxygen layers in silicon-on-insulator processes | Jeffrey S. Brown, Andres Bryant, Robert J. Gauthier, Jr., Randy W. Mann | 2004-08-10 |
| 6762918 | Fault free fuse network | — | 2004-07-13 |
| 6750109 | Halo-free non-rectifying contact on chip with halo source/drain diffusion | James A. Culp, Jawahar P. Nayak, Werner Rausch, Melanie J. Sherony, Noah Zamdmer | 2004-06-15 |
| 6746947 | Post-fuse blow corrosion prevention structure for copper fuses | Timothy H. Daubenspeck, Daniel C. Edelstein, Robert M. Geffken, William T. Motsiff, Anthony K. Stamper | 2004-06-08 |
| 6731488 | Dual emitter transistor with ESD protection | — | 2004-05-04 |
| 6725439 | Method of automated design and checking for ESD robustness | Philip S. Homsinger, Andrew D. Huber, Debra K. Korejwa, William J. Livingstone, Jeannie H. Panner +3 more | 2004-04-20 |
| 6720637 | SiGe transistor, varactor and p-i-n velocity saturated ballasting element for BiCMOS peripheral circuits and ESD networks | — | 2004-04-13 |
| 6710983 | ESD protection for GMR sensors of magnetic heads using SiGe integrated circuit devices | — | 2004-03-23 |
| 6704179 | Automated hierarchical parameterized ESD network design and checking system | — | 2004-03-09 |
| 6700164 | Tungsten hot wire current limiter for ESD protection | Ciaran J. Brennan, Kevin A. Duncan, William R. Tonti | 2004-03-02 |
| 6680520 | Method and structure for forming precision MIM fusible circuit elements using fuses and antifuses | Anthony K. Stamper | 2004-01-20 |