Issued Patents 2004
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6825534 | Semiconductor device on a combination bulk silicon and silicon-on-insulator (SOI) substrate | Howard H. Chen, Louis L. Hsu | 2004-11-30 |
| 6823293 | Hierarchical power supply noise monitoring device and system for very large scale integrated circuits | Howard H. Chen, Louis L. Hsu, Brian L. Ji | 2004-11-23 |
| 6818487 | Self-aligned, planarized thin-film transistors, devices employing the same, and methods of fabrication thereof | Louis L. Hsu, Jack A. Mandelman, William R. Tonti | 2004-11-16 |
| 6803805 | Distributed DC voltage generator for system on chip | Louis L. Hsu, Fanchieh Yee | 2004-10-12 |
| 6781185 | Semiconductor high dielectric constant decoupling capacitor structures and process for fabrication | Howard H. Chen, Louis L. Hsu | 2004-08-24 |
| 6777286 | Compact SRAM cell incorporating refractory metal-silicon-nitrogen resistive elements and method for fabricating | Lawrence A. Clevenger, Louis L. Hsu | 2004-08-17 |
| 6768063 | Structure and method for shadow mask electrode | Lawrence A. Clevenger, Louis L. Hsu, Carl Radens, Kwong Hon Wong | 2004-07-27 |
| 6751151 | Ultra high-speed DDP-SRAM cache | Louis L. Hsu, Toshiaki Kirihata, Robert C. Wong | 2004-06-15 |
| 6744087 | Non-volatile memory using ferroelectric gate field-effect transistors | James Misewich, William Robert Reohr, Alejandro G. Schrott | 2004-06-01 |
| 6737907 | Programmable DC voltage generator system | Louis L. Hsu, John A. Fifield, Wayne F. Ellis | 2004-05-18 |
| 6728916 | Hierarchical built-in self-test for system-on-chip design | Howard H. Chen, Louis L. Hsu | 2004-04-27 |
| 6720595 | Three-dimensional island pixel photo-sensor | Lawrence A. Clevenger, Louis L. Hsu, Carl Radens, Kwong Hon Wong | 2004-04-13 |
| 6697909 | Method and apparatus for performing data access and refresh operations in different sub-arrays of a DRAM cache memory | Louis L. Hsu | 2004-02-24 |