Issued Patents 2002
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6475810 | Method of manufacturing embedded organic stop layer for dual damascene patterning | Mei Sheng Zhou, John Sudijono, Subhash Gupta, Sudipto Ranendra Roy, Yi Xu +2 more | 2002-11-05 |
| 6429117 | Method to create copper traps by modifying treatment on the dielectrics surface | John Sudijono, Yakub Aliyu, Mei Sheng Zhou, Simon Chooi, Subhash Gupta +2 more | 2002-08-06 |
| 6394114 | Method for stripping copper in damascene interconnects | Subhash Gupta, Simon Chooi, Mei Sheng Zhou | 2002-05-28 |
| 6391783 | Method to thin down copper barriers in deep submicron geometries by using alkaline earth element, barrier additives, or self assembly technique | John Sudijono, Yakub Aliyu, Mei Sheng Zhou, Simon Chooi, Subhash Gupta +2 more | 2002-05-21 |
| 6368958 | Method to deposit a cooper seed layer for dual damascence interconnects | Subhash Gupta, Mei Sheng Zhou, Simon Chooi | 2002-04-09 |
| 6365508 | Process without post-etch cleaning-converting polymer and by-products into an inert layer | Mei Sheng Zhou, John Sudijono, Subhash Gupta, Sudipto Ranendra Roy, Xu Yi +2 more | 2002-04-02 |
| 6358821 | Method of copper transport prevention by a sputtered gettering layer on backside of wafer | Subhash Gupta, Simon Chooi, Sudipto Ranendra Roy, Xu Yi, Yakub Aliyu +2 more | 2002-03-19 |
| 6350689 | Method to remove copper contamination by using downstream oxygen and chelating agent plasma | Simon Chooi, Yakub Aliyu, Mei Sheng Zhou, John Sudijono, Subhash Gupta +2 more | 2002-02-26 |
| 6340608 | Method of fabricating copper metal bumps for flip-chip or chip-on-board IC bonding on terminating copper pads | Simon Chooi, Yakub Aliyu, Mei Sheng Zhou, John Sudijono, Subhash Gupta +2 more | 2002-01-22 |