SH

Si Ping Hu

YC Yangtze Memory Technologies Co.: 26 patents #26 of 626Top 5%
Overall (All Time): #151,431 of 4,157,543Top 4%
26
Patents All Time

Issued Patents All Time

Showing 25 most recent of 26 patents

Patent #TitleCo-InventorsDate
12137558 Staircase structure for memory device Zhenyu Lu, Jun Chen, Xiaowang Dai, Jifeng Zhu, Qian Tao +6 more 2024-11-05
12010838 Staircase structure for memory device Zhenyu Lu, Jun Chen, Xiaowang Dai, Jifeng Zhu, Qian Tao +6 more 2024-06-11
11996322 Method for forming lead wires in hybrid-bonded semiconductor devices Meng Yan, Jifeng Zhu 2024-05-28
11876049 Bonding alignment marks at bonding interface Meng Yan, Jia Wen Wang, Shun Hu 2024-01-16
11791265 Method for forming three-dimensional integrated wiring structure and semiconductor structure thereof Jifeng Zhu, Jun Chen, Zhenyu Lu 2023-10-17
11715718 Bonding contacts having capping layer and method for forming the same Jie Pan, Shu Liang Lv, Liang Ma, Yuan Li, Xianjin Wan 2023-08-01
11670543 Method for forming lead wires in hybrid-bonded semiconductor devices Meng Yan, Jifeng Zhu 2023-06-06
11462503 Hybrid bonding using dummy bonding contacts Tao Wang, Jia Wen Wang, Shi Qi Huang, Jifeng Zhu, Jun Chen +1 more 2022-10-04
11322392 Method for forming lead wires in hybrid-bonded semiconductor devices Meng Yan, Jifeng Zhu 2022-05-03
11289422 Bonding alignment marks at bonding in interface Meng Yan, Jia Wen Wang, Shun Hu 2022-03-29
11276642 Method for forming three-dimensional integrated wiring structure and semiconductor structure thereof Jifeng Zhu, Jun Chen, Zhenyu Lu 2022-03-15
11205619 Hybrid bonding using dummy bonding contacts and dummy interconnects Tao Wang, Jia Wen Wang, Shi Qi Huang, Jifeng Zhu, Jun Chen +1 more 2021-12-21
11177231 Bonding contacts having capping layer and method for forming the same Jie Pan, Shu Liang Lv, Liang Ma, Yuan Li, Xianjin Wan 2021-11-16
11145666 Staircase structure for memory device Zhenyu Lu, Jun Chen, Xiaowang Dai, Jifeng Zhu, Qian Tao +6 more 2021-10-12
11101276 Word line contact structure for three-dimensional memory devices and fabrication methods thereof Jifeng Zhu, Zhenyu Lu, Jun Chen, Xiaowang Dai, Lan Yao +4 more 2021-08-24
11056387 Method for forming three-dimensional integrated wiring structure and semiconductor structure thereof Jifeng Zhu, Jun Chen, Zhenyu Lu 2021-07-06
11049834 Hybrid bonding using dummy bonding contacts Tao Wang, Jia Wen Wang, Shi Qi Huang, Jifeng Zhu, Jun Chen +1 more 2021-06-29
10796993 Method for forming three-dimensional integrated wiring structure and semiconductor structure thereof Jifeng Zhu, Jun Chen, Zhenyu Lu 2020-10-06
10763158 Method for forming lead wires in hybrid-bonded semiconductor devices Meng Yan, Jifeng Zhu 2020-09-01
10748851 Hybrid bonding using dummy bonding contacts and dummy interconnects Tao Wang, Jia Wen Wang, Shi Qi Huang, Jifeng Zhu, Jun Chen +1 more 2020-08-18
10679941 Method for forming three-dimensional integrated wiring structure and semiconductor structure thereof Jifeng Zhu, Jun Chen, Zhenyu Lu 2020-06-09
10680003 Staircase structure for memory device Zhenyu Lu, Jun Chen, Xiaowang Dai, Jifeng Zhu, Qian Tao +6 more 2020-06-09
10672711 Word line contact structure for three-dimensional memory devices and fabrication methods thereof Jifeng Zhu, Zhenyu Lu, Jun Chen, Xiaowang Dai, Lan Yao +4 more 2020-06-02
10651087 Method for forming three-dimensional integrated wiring structure and semiconductor structure thereof Jifeng Zhu, Jun Chen, Zhenyu Lu 2020-05-12
10607887 Method for forming three-dimensional integrated wiring structure and semiconductor structure thereof Jifeng Zhu, Jun Chen, Zhenyu Lu 2020-03-31