Issued Patents All Time
Showing 76–100 of 277 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9330011 | Microprocessor with integrated NOP slide detector | — | 2016-05-03 |
| 9317301 | Microprocessor with boot indicator that indicates a boot ISA of the microprocessor as either the X86 ISA or the ARM ISA | G. Glenn Henry, Rodney E. Hooker | 2016-04-19 |
| 9317288 | Multi-core microprocessor that performs x86 ISA and ARM ISA machine language program instructions by hardware translation into microinstructions executed by common execution pipeline | G. Glenn Henry, Rodney E. Hooker | 2016-04-19 |
| 9274795 | Conditional non-branch instruction prediction | G. Glenn Henry, Rodney E. Hooker | 2016-03-01 |
| 9244686 | Microprocessor that translates conditional load/store instructions into variable number of microinstructions | G. Glenn Henry, Rodney E. Hooker, Gerard M. Col, Colin Eddy | 2016-01-26 |
| 9176733 | Load multiple and store multiple instructions in a microprocessor that emulates banked registers | G. Glenn Henry, Rodney E. Hooker | 2015-11-03 |
| 9146742 | Heterogeneous ISA microprocessor that preserves non-ISA-specific configuration state when reset to different ISA | G. Glenn Henry, Rodney E. Hooker | 2015-09-29 |
| 9141389 | Heterogeneous ISA microprocessor with shared hardware ISA registers | G. Glenn Henry, Rodney E. Hooker | 2015-09-22 |
| 9128701 | Generating constant for microinstructions from modified immediate field during instruction translation | G. Glenn Henry, Rodney E. Hooker | 2015-09-08 |
| 9043580 | Accessing model specific registers (MSR) with different sets of distinct microinstructions for instructions of different instruction set architecture (ISA) | G. Glenn Henry, Rodney E. Hooker | 2015-05-26 |
| 9032189 | Efficient conditional ALU instruction in read-port limited register file microprocessor | G. Glenn Henry, Gerard M. Col, Rodney E. Hooker | 2015-05-12 |
| 9002014 | On-die cryptographic apparatus in a secure microprocessor | G. Glenn Henry | 2015-04-07 |
| 8978132 | Apparatus and method for managing a microprocessor providing for a secure execution mode | G. Glenn Henry | 2015-03-10 |
| 8924695 | Conditional ALU instruction condition satisfaction propagation between microinstructions in read-port limited register file microprocessor | G. Glenn Henry, Gerard M. Col, Rodney E. Hooker | 2014-12-30 |
| 8910276 | Apparatus and method for precluding execution of certain instructions in a secure execution mode microprocessor | G. Glenn Henry | 2014-12-09 |
| 8886960 | Microprocessor that facilitates task switching between encrypted and unencrypted programs | G. Glenn Henry, Brent Bean, Thomas A. Crispin | 2014-11-11 |
| 8880902 | Microprocessor that securely decrypts and executes encrypted instructions | G. Glenn Henry, Brent Bean, Thomas A. Crispin | 2014-11-04 |
| 8880857 | Conditional ALU instruction pre-shift-generated carry flag propagation between microinstructions in read-port limited register file microprocessor | G. Glenn Henry, Gerard M. Col, Rodney E. Hooker | 2014-11-04 |
| 8880854 | Out-of-order execution microprocessor that speculatively executes dependent memory access instructions by predicting no value change by older instructions that load a segment register | Rodney E. Hooker, Gerard M. Col | 2014-11-04 |
| 8880851 | Microprocessor that performs X86 ISA and arm ISA machine language program instructions by hardware translation into microinstructions executed by common execution pipeline | G. Glenn Henry, Rodney E. Hooker | 2014-11-04 |
| 8856496 | Microprocessor that fuses load-alu-store and JCC macroinstructions | G. Glenn Henry | 2014-10-07 |
| 8850229 | Apparatus for generating a decryption key for use to decrypt a block of encrypted instruction data being fetched from an instruction cache in a microprocessor | G. Glenn Henry, Brent Bean, Thomas A. Crispin | 2014-09-30 |
| 8850164 | Microprocessor that fuses MOV/ALU/JCC instructions | — | 2014-09-30 |
| 8843729 | Microprocessor that fuses MOV/ALU instructions | — | 2014-09-23 |
| 8838924 | Microprocessor having internal secure memory | G. Glenn Henry | 2014-09-16 |