Issued Patents All Time
Showing 126–150 of 277 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8316243 | Apparatus and method for generating unpredictable processor-unique serial number for use as an encryption key | G. Glenn Henry | 2012-11-20 |
| 8296345 | Microprocessor with selectively available random number generator based on self-test result | Thomas A. Crispin, G. Glenn Henry | 2012-10-23 |
| 8281198 | User-initiatable method for detecting re-grown fuses within a microprocessor | G. Glenn Henry | 2012-10-02 |
| 8255703 | Atomic hash instruction | Thomas A. Crispin, G. Glenn Henry | 2012-08-28 |
| 8245017 | Pipelined microprocessor with normal and fast conditional branch instructions | G. Glenn Henry, Brent Bean | 2012-08-14 |
| 8234543 | Detection and correction of fuse re-growth in a microprocessor | G. Glenn Henry, Charles John Holthaus | 2012-07-31 |
| 8209763 | Processor with non-volatile mode enable register entering secure execution mode and encrypting secure program for storage in secure memory via private bus | G. Glenn Henry | 2012-06-26 |
| 8145890 | Pipelined microprocessor with fast conditional branch instructions based on static microcode-implemented instruction state | G. Glenn Henry, Brent Bean | 2012-03-27 |
| 8132022 | Apparatus and method for employing configurable hash algorithms | Thomas A. Crispin, G. Glenn Henry | 2012-03-06 |
| 8131984 | Pipelined microprocessor with fast conditional branch instructions based on static serializing instruction state | G. Glenn Henry, Brent Bean | 2012-03-06 |
| 8132023 | Apparatus and method for performing transparent hash functions | Thomas A. Crispin, G. Glenn Henry | 2012-03-06 |
| 8090931 | Microprocessor with fused store address/store data microinstruction | Gerard M. Col, G. Glenn Henry, Rodney E. Hooker | 2012-01-03 |
| 8069339 | Microprocessor with microinstruction-specifiable non-architectural condition code flag register | G. Glenn Henry, Gerard M. Col | 2011-11-29 |
| 8060755 | Apparatus and method for providing user-generated key schedule in a microprocessor cryptographic engine | G. Glenn Henry, Thomas A. Crispin | 2011-11-15 |
| 8046400 | Apparatus and method for optimizing the performance of x87 floating point addition instructions in a microprocessor | Tom Elmer | 2011-10-25 |
| 7979675 | Pipelined microprocessor with fast non-selective correct conditional branch instruction resolution | G. Glenn Henry, Brent Bean | 2011-07-12 |
| 7975132 | Apparatus and method for fast correct resolution of call and return instructions using multiple call/return stacks in the presence of speculative conditional instruction execution in a pipelined microprocessor | Brent Bean, G. Glenn Henry | 2011-07-05 |
| 7937561 | Merge microinstruction for minimizing source dependencies in out-of-order execution microprocessor with variable data size macroarchitecture | Gerard M. Col | 2011-05-03 |
| 7925891 | Apparatus and method for employing cryptographic functions to generate a message digest | Thomas A. Crispin, G. Glenn Henry | 2011-04-12 |
| 7921300 | Apparatus and method for secure hash algorithm | Thomas A. Crispin, G. Glenn Henry | 2011-04-05 |
| 7917568 | X87 fused multiply-add instruction | G. Glenn Henry, Timothy A. Elliott | 2011-03-29 |
| 7900055 | Microprocessor apparatus and method for employing configurable block cipher cryptographic algorithms | G. Glenn Henry, Thomas A. Crispin | 2011-03-01 |
| 7849120 | Microprocessor with random number generator and instruction for storing random data | G. Glenn Henry | 2010-12-07 |
| 7844053 | Microprocessor apparatus and method for performing block cipher cryptographic functions | Thomas A. Crispin, G. Glenn Henry | 2010-11-30 |
| 7827390 | Microprocessor with private microcode RAM | G. Glenn Henry, Colin Eddy, Rodney E. Hooker | 2010-11-02 |