Issued Patents All Time
Showing 101–125 of 277 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8819839 | Microprocessor having a secure execution mode with provisions for monitoring, indicating, and managing security levels | G. Glenn Henry | 2014-08-26 |
| 8793803 | Termination of secure execution mode in a microprocessor providing for execution of secure code | G. Glenn Henry | 2014-07-29 |
| 8793785 | Revokeable MSR password protection | G. Glenn Henry | 2014-07-29 |
| 8762687 | Microprocessor providing isolated timers and counters for execution of secure code | G. Glenn Henry | 2014-06-24 |
| 8719589 | Microprocessor that facilitates task switching between multiple encrypted programs having different associated decryption key values | G. Glenn Henry, Brent Bean, Thomas A. Crispin | 2014-05-06 |
| 8700919 | Switch key instruction in a microprocessor that fetches and decrypts encrypted instructions | G. Glenn Henry, Brent Bean, Thomas A. Crispin | 2014-04-15 |
| 8683225 | Microprocessor that facilitates task switching between encrypted and unencrypted programs | G. Glenn Henry, Brent Bean, Thomas A. Crispin | 2014-03-25 |
| 8671285 | Microprocessor that fetches and decrypts encrypted instructions in same time as plain text instructions | G. Glenn Henry, Brent Bean, Thomas A. Crispin | 2014-03-11 |
| 8645714 | Branch target address cache for predicting instruction decryption keys in a microprocessor that fetches and decrypts encrypted instructions | G. Glenn Henry, Brent Bean, Thomas A. Crispin | 2014-02-04 |
| 8639945 | Branch and switch key instruction in a microprocessor that fetches and decrypts encrypted instructions | G. Glenn Henry, Brent Bean, Thomas A. Crispin | 2014-01-28 |
| 8635437 | Pipelined microprocessor with fast conditional branch instructions based on static exception state | G. Glenn Henry, Brent Bean | 2014-01-21 |
| 8615799 | Microprocessor having secure non-volatile storage access | G. Glenn Henry | 2013-12-24 |
| 8607034 | Apparatus and method for disabling a microprocessor that provides for a secure execution mode | G. Glenn Henry | 2013-12-10 |
| 8590038 | Revokeable MSR password protection | G. Glenn Henry | 2013-11-19 |
| 8560810 | Microprocessor with microtranslator and tail microcode instruction for fast execution of complex macroinstructions having both memory and register forms | — | 2013-10-15 |
| 8522354 | Microprocessor apparatus for secure on-die real-time clock | G. Glenn Henry | 2013-08-27 |
| 8521996 | Pipelined microprocessor with fast non-selective correct conditional branch instruction resolution | G. Glenn Henry, Brent Bean | 2013-08-27 |
| 8495343 | Apparatus and method for detection and correction of denormal speculative floating point operand | G. Glenn Henry, Gerard M. Col, Timothy A. Elliott, Rodney E. Hooker | 2013-07-23 |
| 8423751 | Microprocessor with fast execution of call and return instructions | G. Glenn Henry, Brent Bean | 2013-04-16 |
| 8402279 | Apparatus and method for updating set of limited access model specific registers in a microprocessor | G. Glenn Henry | 2013-03-19 |
| 8386755 | Non-atomic scheduling of micro-operations to perform round instruction | Tom Elmer | 2013-02-26 |
| 8375078 | Fast floating point result forwarding using non-architected data format | G. Glenn Henry | 2013-02-12 |
| 8370641 | Initialization of a microprocessor providing for execution of secure code | G. Glenn Henry | 2013-02-05 |
| 8341419 | Apparatus and method for limiting access to model specific registers in a microprocessor | G. Glenn Henry | 2012-12-25 |
| 8332618 | Out-of-order X86 microprocessor with fast shift-by-zero handling | Gerard M. Col, Matthew Daniel Day, Bryan Wayne Pogor | 2012-12-11 |