Issued Patents All Time
Showing 176–184 of 184 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5364803 | Method of preventing fluorine-induced gate oxide degradation in WSi.sub.x polycide structure | Cheng-Han Huang | 1994-11-15 |
| 5364817 | Tungsten-plug process | Cheng-Han Huang, Shih-Chanh Chang, Liang Chih Lin | 1994-11-15 |
| 5358733 | Stress release metallization for VLSI circuits | J. Y. Wu | 1994-10-25 |
| 5308786 | Trench isolation for both large and small areas by means of silicon nodules after metal etching | Jiunn Y. Wu, Anna Su | 1994-05-03 |
| 5294562 | Trench isolation with global planarization using flood exposure | Nien-Tsu Peng, Paul P. W. Yen | 1994-03-15 |
| 5292680 | Method of forming a convex charge coupled device | J. Y. Wu, Jenn-Tarng Lin | 1994-03-08 |
| 5254495 | Salicide recessed local oxidation of silicon | J. Y. Wu | 1993-10-19 |
| 5214305 | Polycide gate MOSFET for integrated circuits | Chen-Hsien Huang | 1993-05-25 |
| 5130266 | Polycide gate MOSFET process for integrated circuits | Cheng-Han Huang | 1992-07-14 |