Issued Patents All Time
Showing 51–72 of 72 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8168374 | Method of forming a contact hole | Pei-Yu Chou | 2012-05-01 |
| 8164141 | Opening structure with sidewall of an opening covered with a dielectric thin film | Po-Chao Tsao, Chang-Chi Huang, Ming-Tsung Chen, Feng-Yi Chang, Pei-Yu Chou +2 more | 2012-04-24 |
| 8137472 | Semiconductor process | Chang-Hsiao Lee, Shih-Fang Tzou, Ming-Da Hsieh, Yu-Tsung Lai, Jyh-Cherng Yau | 2012-03-20 |
| 8101092 | Method for controlling ADI-AEI CD difference ratio of openings having different sizes | Chih-Wen Feng, Pei-Yu Chou, Chun-Ting Yeh, Jyh-Cherng Yau, Feng-Yi Chang +1 more | 2012-01-24 |
| 8080877 | Damascene interconnection structure and dual damascene process thereof | Chun-Jen Huang, Yu-Tsung Lai, Jyh-Cherng Yau | 2011-12-20 |
| 8071487 | Patterning method using stacked structure | Meng-Jun Wang, Yi-Hsing Chen, Min-Chieh Yang, Chuan-Kai Wang | 2011-12-06 |
| 7977244 | Semiconductor manufacturing process | Yu-Tsung Lai, Chun-Jen Huang, Jyh-Cherng Yau | 2011-07-12 |
| 7868390 | Method for fabricating strained-silicon CMOS transistor | Pei-Yu Chou, Shih-Fang Tzou | 2011-01-11 |
| 7851370 | Patterning method | Lung-En Kuo, Min-Chieh Yang | 2010-12-14 |
| 7846345 | Method of manufacturing an imprinting template using a semiconductor manufacturing process and the imprinting template obtained | Pei-Yu Chou | 2010-12-07 |
| 7829472 | Method of forming at least an opening using a tri-layer structure | Wei-Hang Huang, Kai-Siang Neo, Pei-Yu Chou | 2010-11-09 |
| 7799511 | Method of forming a contact hole | Pei-Yu Chou | 2010-09-21 |
| 7767578 | Damascene interconnection structure and dual damascene process thereof | Chun-Jen Huang, Yu-Tsung Lai, Jyh-Cherng Yau | 2010-08-03 |
| 7687446 | Method of removing residue left after plasma process | Cheng-Ming Weng, Miao-Chun Lin, Mei-Chi Wang, Wei Yang | 2010-03-30 |
| 7615434 | CMOS device and fabricating method thereof | Shih-Wei Sun, Shih-Fang Tzou, Pei-Yu Chou | 2009-11-10 |
| 7592265 | Method of trimming a hard mask layer, method for fabricating a gate in a MOS transistor, and a stack for fabricating a gate in a MOS transistor | Meng-Jun Wang, Yi-Hsing Chen, Min-Chieh Yang | 2009-09-22 |
| 7544623 | Method for fabricating a contact hole | Pei-Yu Chou, Wen-Chou Tsai | 2009-06-09 |
| 7517766 | Method of removing a spacer, method of manufacturing a metal-oxide-semiconductor transistor device, and metal-oxide-semiconductor transistor device | Pei-Yu Chou, Shih-Fang Tzou | 2009-04-14 |
| 7445726 | Photoresist trimming process | Kevin Wang | 2008-11-04 |
| 7432194 | Etching method and method for forming contact opening | Pei-Yu Chou | 2008-10-07 |
| 7378341 | Automatic process control of after-etch-inspection critical dimension | Pei-Yu Chou, Wen-Chou Tsai | 2008-05-27 |
| 6736146 | Method of rapidly reworking color filters | Ching-Chung Chen | 2004-05-18 |