Issued Patents All Time
Showing 26–50 of 72 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8952451 | Semiconductor device having metal gate and manufacturing method thereof | Po-Jui Liao, Tsung-Lung Tsai, Chien-Ting Lin, Shao-Hua Hsu, Yeng-Peng Wang +6 more | 2015-02-10 |
| 8828815 | Method for fabricating strained-silicon CMOS transistor | Pei-Yu Chou, Shih-Fang Tzou | 2014-09-09 |
| 8791013 | Pattern forming method | Shin-Chi Chen, Yu-Tsung Lai, Guang-Yaw Hwang | 2014-07-29 |
| 8735295 | Method of manufacturing dual damascene structure | Chang-Hsiao Lee, Hsin-Yu Chen, Yu-Tsung Lai, Shih-Chun Tsai | 2014-05-27 |
| 8704294 | Semiconductor device having metal gate and manufacturing method thereof | Po-Jui Liao, Tsung-Lung Tsai, Chien-Ting Lin, Shao-Hua Hsu, Yeng-Peng Wang +6 more | 2014-04-22 |
| 8691659 | Method for forming void-free dielectric layer | Ching-Pin Hsu, Yi-Po Lin, Chieh-Te Chen, Feng-Yi Chang, Shang-Yuan Tsai +1 more | 2014-04-08 |
| 8691652 | Semiconductor process | Lung-En Kuo, Hsuan-Hsu Chen | 2014-04-08 |
| 8673544 | Method of forming openings | Pei-Yu Chou | 2014-03-18 |
| 8633549 | Semiconductor device and fabrication method thereof | Chieh-Te Chen, Shih-Fang Tzou, Yi-Po Lin | 2014-01-21 |
| 8592304 | Method for filling metal | Chang-Hsiao Lee, Yu-Tsung Lai | 2013-11-26 |
| 8592322 | Method of fabricating openings | Feng-Yi Chang, Pei-Yu Chou, Chih-Wen Feng, Ying-Chih Lin, Po-Chao Tsao | 2013-11-26 |
| 8592321 | Method for fabricating an aperture | Feng-Yi Chang, Yi-Po Lin, Shang-Yuan Tsai, Chih-Wen Feng, Shui-Yen Lu +1 more | 2013-11-26 |
| 8574990 | Method of manufacturing semiconductor device having metal gate | Po-Jui Liao, Tsung-Lung Tsai, Chien-Ting Lin, Shao-Hua Hsu, Shui-Yen Lu +6 more | 2013-11-05 |
| 8552503 | Strained silicon structure | Guang-Yaw Hwang, Ling-Chun Chou, I-Chang Wang, Shin-Chuan Huang, Shin-Chi Chen +4 more | 2013-10-08 |
| 8524608 | Method for fabricating a patterned structure of a semiconductor device | Lung-En Kuo, Hsuan-Hsu Chen, Meng-Chun Lee | 2013-09-03 |
| 8461649 | Opening structure for semiconductor device | Po-Chao Tsao, Chang-Chi Huang, Ming-Tsung Chen, Feng-Yi Chang, Pei-Yu Chou +2 more | 2013-06-11 |
| 8324038 | Method of removing a spacer, method of manufacturing a metal-oxide-semiconductor transistor device, and metal-oxide-semiconductor transistor device | Pei-Yu Chou, Shih-Fang Tzou | 2012-12-04 |
| 8323877 | Patterning method and method for fabricating dual damascene opening | Ming-Da Hsieh, Yu-Tsung Lai | 2012-12-04 |
| 8310012 | Semiconductor device having metal gate and manufacturing method thereof | Guang-Yaw Hwang, Yu-Ru Yang, Pei-Yu Chou | 2012-11-13 |
| 8298935 | Dual damascene process | Shin-Chi Chen, Yu-Tsung Lai, Guang-Yaw Hwang | 2012-10-30 |
| 8293639 | Method for controlling ADI-AEI CD difference ratio of openings having different sizes | Feng-Yih Chang, Pei-Yu Chou, Chih-Wen Feng, Ying-Chih Lin | 2012-10-23 |
| 8282842 | Cleaning method following opening etch | Chieh-Ju Wang, Jyh-Cherng Yau, Yu-Tsung Lai | 2012-10-09 |
| 8277674 | Method of removing post-etch residues | Chang-Hsiao Lee, Yu-Tsung Lai | 2012-10-02 |
| 8252650 | Method for fabricating CMOS transistor | Feng-Yi Chang, Yi-Po Lin, Shang-Yuan Tsai, Chih-Wen Feng, Shui-Yen Lu +1 more | 2012-08-28 |
| 8236702 | Method of fabricating openings and contact holes | Feng-Yi Chang, Pei-Yu Chou, Chih-Wen Feng, Ying-Chih Lin, Po-Chao Tsao | 2012-08-07 |