Issued Patents All Time
Showing 26–40 of 40 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6140227 | Method of fabricating a glue layer of contact/via | Water Lur | 2000-10-31 |
| 6136713 | Method for forming a shallow trench isolation structure | Jenn Tsao, Water Lur | 2000-10-24 |
| 6133083 | Method to fabricate embedded DRAM | Tony Lin, Jenn Tsao | 2000-10-17 |
| 6117743 | Method of manufacturing MOS device using anti reflective coating | Wen-Kuan Yeh, Tony Lin | 2000-09-12 |
| 6083827 | Method for fabricating local interconnect | Tony Lin, Wen-Kuan Yeh | 2000-07-04 |
| 6063689 | Method for forming an isolation | Water Lur | 2000-05-16 |
| 6015755 | Method of fabricating a trench isolation structure using a reverse mask | Juan-Yuan Wu, Water Lur | 2000-01-18 |
| 6004852 | Manufacture of MOSFET having LDD source/drain region | Wen-Kuan Yeh, George Jyh-Shann Chou | 1999-12-21 |
| 5976984 | Process of making unlanded vias | Chih-Chien Liu, Kun-Chih Wang, Tri-Rung Yew | 1999-11-02 |
| 5958795 | Chemical-mechanical polishing for shallow trench isolation | Juan-Yuan Wu, Water Lur | 1999-09-28 |
| 5950090 | Method for fabricating a metal-oxide semiconductor transistor | Tony Lin, Jih-Wen Chou | 1999-09-07 |
| 5933748 | Shallow trench isolation process | George Jyh-Shann Chou | 1999-08-03 |
| 5861329 | Method of fabricating metal-oxide semiconductor (MOS) transistors with reduced level of degradation caused by hot carriers | Wen-Kuan Yeh, Meng-Jin Tsai, Jih-Wen Chou | 1999-01-19 |
| 5786255 | Method of forming a metallic oxide semiconductor | Wen-Kuan Yeh, Jih-Wen Chou | 1998-07-28 |
| 5770508 | Method of forming lightly doped drains in metalic oxide semiconductor components | Wen-Kuan Yeh, Jih-Wen Chou | 1998-06-23 |