Issued Patents All Time
Showing 26–50 of 88 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11521929 | Capping layer for liner-free conductive structures | Shuen-Shin Liang, Chun-I Tsai, Chih-Wei Chang, Hung-Yi Huang, Keng-Chu Lin +4 more | 2022-12-06 |
| 11489010 | Layout pattern of magnetoresistive random access memory | Chun-Yen Tseng, Shu-Ru Wang, Yu-Tse Kuo, Chang-Hung Chen, Yi-Ting Wu +2 more | 2022-11-01 |
| 11475953 | Semiconductor layout pattern and forming method thereof | Chun-Yen Tseng, Yu-Tse Kuo, Shu-Ru Wang, Hsin-Chih Yu, Meng-Ping Chuang +1 more | 2022-10-18 |
| 11475952 | Ternary content addressable memory and two-port static random access memory | Yu-Tse Kuo, Shu-Ru Wang, Chun-Yen Tseng, Chun-Chieh Chang | 2022-10-18 |
| 11410880 | Phase control in contact formation | I-Li Chen, Pin-Wen Chen, Yuan-Chen Hsu, Wei-Jung Lin, Chih-Wei Chang +1 more | 2022-08-09 |
| 11232985 | Method of forming contact metal | Hong-Mao Lee, Hsien-Lung Yang, Yu-Kai Chen, Wei-Jung Lin | 2022-01-25 |
| 11217524 | Interconnect structure and manufacturing method for the same | Shuen-Shin Liang, Ken-Yu Chang, Hung-Yi Huang, Chien-Kuo Chang, Chi-Hung Chuang +7 more | 2022-01-04 |
| 11170854 | Layout pattern of two-port ternary content addressable memory | Ching-Cheng Lung, Yu-Tse Kuo, Shu-Ru Wang, Chun-Yen Tseng | 2021-11-09 |
| 11101353 | Semiconductor device and method of manufacture | Chang-Ting Chung, Wei-Cheng Lin, Wei-Jung Lin, Chih-Wei Chang | 2021-08-24 |
| 11031286 | Conductive feature formation and structure | Wei-Yip Loh, Chih-Wei Chang, Hong-Mao Lee, Yu-Ming Huang, Yan-Ming Tsai +4 more | 2021-06-08 |
| 10978122 | Memory including non-volatile cells and current driving circuit | Chun-Yen Tseng, Yu-Tse Kuo, Chang-Hung Chen, Shu-Ru Wang, Ya-Lan Chiou +10 more | 2021-04-13 |
| 10957640 | Method for manufacturing a semiconductor structure | Yu-Hung Lin, I-Tseng Chen | 2021-03-23 |
| 10892013 | Two-port ternary content addressable memory and layout pattern thereof, and associated memory device | Ching-Cheng Lung, Yu-Tse Kuo, Shu-Ru Wang, Chun-Yen Tseng | 2021-01-12 |
| 10861549 | Ternary content addressable memory unit capable of reducing charge sharing effect | Chun-Yen Tseng, Ching-Cheng Lung, Yu-Tse Kuo, Chih-Wei Tsai, Hsin-Chih Yu +1 more | 2020-12-08 |
| 10847521 | Layout pattern of a static random access memory | Ching-Cheng Lung, Yu-Tse Kuo, Shu-Ru Wang, Chun-Yen Tseng | 2020-11-24 |
| 10706914 | Static random access memory | Chun-Yen Tseng, Ching-Cheng Lung, Yu-Tse Kuo, Hsin-Chih Yu, Shu-Ru Wang | 2020-07-07 |
| 10559573 | Static random access memory structure | Shu-Ru Wang, Ching-Cheng Lung, Yu-Tse Kuo, Chien-Hung Chen, Li-Ping Huang +2 more | 2020-02-11 |
| 10522551 | Semiconductor device and semiconductor apparatus | Ching-Cheng Lung, Yu-Tse Kuo, Chang-Hung Chen, Shu-Ru Wang, Wei-Chi Lee +1 more | 2019-12-31 |
| 10468420 | Method of forming static random-access memory (SRAM) cell array | Yu-Tse Kuo, Shu-Ru Wang | 2019-11-05 |
| 10418279 | Method of forming contact metal | Hong-Mao Lee, Hsien-Lung Yang, Yu-Kai Chen, Wei-Jung Lin | 2019-09-17 |
| 10410684 | Memory device with oxide semiconductor static random access memory and method for operating the same | Chun-Yen Tseng, Ting-Hao Chang, Ching-Cheng Lung, Yu-Tse Kuo, Shih-Hao Liang +2 more | 2019-09-10 |
| 10381056 | Dual port static random access memory (DPSRAM) cell | Tien-Yu Lu, Ching-Cheng Lung, Yu-Tse Kuo, Shou-Sian Chen, Koji Nii +1 more | 2019-08-13 |
| 10366756 | Control circuit used for ternary content-addressable memory with two logic units | Chun-Yen Tseng, Ching-Cheng Lung, Yu-Tse Kuo, Hsin-Chih Yu, Shu-Ru Wang | 2019-07-30 |
| 10340218 | Method of manufacturing semiconductor structure comprising plurality of through holes using metal hard mask | Yu-Hung Lin, I-Tseng Chen | 2019-07-02 |
| 10276561 | Semiconductor structure with resistor layer and method for forming the same | I-Tseng Chen, Hon-Lin Huang, Yu-Hung Lin | 2019-04-30 |