Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7673190 | System and method for detecting and recovering from errors in an instruction stream of an electronic data processing system | Lawrence R. Fontaine, John S. Kuslak, Conrad S. Shimada | 2010-03-02 |
| 7562263 | System and method for detecting and recovering from errors in a control store of an electronic data processing system | Douglas A. Fuller, David C. Johnson | 2009-07-14 |
| 6601153 | Method and apparatus for increasing computer performance through asynchronous memory block initialization | Hans C. Mikkelsen, Wayne D. Ward | 2003-07-29 |
| 5980092 | Method and apparatus for optimizing a gated clock structure using a standard optimization tool | Kenneth E. Merryman, Kevin C. Cleereman | 1999-11-09 |
| 5956256 | Method and apparatus for optimizing a circuit design having multi-paths therein | James E. Rezek, Kevin C. Cleereman, Kenneth E. Merryman | 1999-09-21 |
| 5905881 | Delayed state writes for an instruction processor | Nguyen T. Tran, John S. Kuslak, Lawrence R. Fontaine | 1999-05-18 |
| 5867699 | Instruction flow control for an instruction processor | John S. Kuslak, David C. Johnson, Gary J. Lucas | 1999-02-02 |
| 5864487 | Method and apparatus for identifying gated clocks within a circuit design using a standard optimization tool | Kenneth E. Merryman, Kevin C. Cleereman | 1999-01-26 |
| 5796972 | Method and apparatus for performing microcode paging during instruction execution in an instruction processor | David C. Johnson, Douglas A. Fuller, Gregory Marlan, Ronald G. Arnold, Gerald G. Fagerness | 1998-08-18 |
| 5724250 | Method and apparatus for performing drive strength adjust optimization in a circuit design | Joseph P. Kerzman, Robert J. Palermo, Douglas A. Fuller | 1998-03-03 |
| 4376976 | Overlapped macro instruction control system | Archie E. Lahti, Donald R. Kalvestrand | 1983-03-15 |