Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6421818 | Efficient top-down characterization method | Guy Dupenloup | 2002-07-16 |
| 6026220 | Method and apparatus for incremntally optimizing a circuit design | Kenneth E. Merryman, Steve D. Thatcher | 2000-02-15 |
| 5980092 | Method and apparatus for optimizing a gated clock structure using a standard optimization tool | Kenneth E. Merryman, Kenneth L. Engelbrecht | 1999-11-09 |
| 5960184 | Method and apparatus for providing optimization parameters to a logic optimizer tool | Kenneth E. Merryman | 1999-09-28 |
| 5956256 | Method and apparatus for optimizing a circuit design having multi-paths therein | James E. Rezek, Kenneth E. Merryman, Kenneth L. Engelbrecht | 1999-09-21 |
| 5940604 | Method and apparatus for monitoring the performance of a circuit optimization tool | Kenneth E. Merryman | 1999-08-17 |
| 5864487 | Method and apparatus for identifying gated clocks within a circuit design using a standard optimization tool | Kenneth E. Merryman, Kenneth L. Engelbrecht | 1999-01-26 |