JS

Juan J. Noguera Serra

📍 San Jose, CA: #1,653 of 32,062 inventorsTop 6%
🗺 California: #13,801 of 386,348 inventorsTop 4%
Overall (All Time): #96,183 of 4,157,543Top 3%
35
Patents All Time

Issued Patents All Time

Showing 1–25 of 35 patents

Patent #TitleCo-InventorsDate
12261603 Adaptive integrated programmable device platform Sagheer Ahmad, Jaideep Dastidar, Brian C. Gaide, Ian A. Swarbrick 2025-03-25
12164451 Data processing array interface having interface tiles with multiple direct memory access circuits David Clarke, Peter McColgan, Tim Tuan, Saurabh Mathur, Amarnath Kasibhatla +3 more 2024-12-10
12105667 Device with data processing engine array that enables partial reconfiguration Sneha Bhalchandra Date, Jan Langer, Baris Ozgul, Goran H K Bilski 2024-10-01
12067406 Multiple overlays for use with a data processing array Baris Ozgul, David Clarke, Peter McColgan, Stephan Munz, Dylan Stuart +1 more 2024-08-20
12001367 Multi-die integrated circuit with data processing engine array Tim Tuan, Sridhar Subramanian 2024-06-04
11972132 Data processing engine arrangement in a device Goran H K Bilski, Jan Langer, Baris Ozgul, Richard L. Walke, Ralph D. Wittig +3 more 2024-04-30
11853235 Communicating between data processing engines using shared memory Goran H K Bilski, Baris Ozgul, Jan Langer 2023-12-26
11730325 Dual mode interconnect Peter McColgan, Goran H K Bilski, Jan Langer, Baris Ozgul, David Clarke 2023-08-22
11693808 Multi-die integrated circuit with data processing engine array Tim Tuan, Sridhar Subramanian 2023-07-04
11683038 Adaptive integrated programmable device platform Sagheer Ahmad, Jaideep Dastidar, Brian C. Gaide, Ian A. Swarbrick 2023-06-20
11599498 Device with data processing engine array that enables partial reconfiguration Sneha Bhalchandra Date, Jan Langer, Baris Ozgul, Goran H K Bilski 2023-03-07
11573726 Data processing engine arrangement in a device Goran H K Bilski, Jan Langer, Baris Ozgul, Richard L. Walke, Ralph D. Wittig +3 more 2023-02-07
11567881 Event-based debug, trace, and profile in device with data processing engine array Goran H K Bilski, David Clarke, Baris Ozgul, Jan Langer 2023-01-31
11379389 Communicating between data processing engines using shared memory Goran H K Bilski, Baris Ozgul, Jan Langer 2022-07-05
11372803 Data processing engine tile architecture for an integrated circuit Goran H K Bilski, Baris Ozgul, Jan Langer, David Clarke, Sneha Bhalchandra Date 2022-06-28
11336287 Data processing engine array architecture with memory tiles Javier Cabezas Rodriguez, David Clarke, Sneha Bhalchandra Date, Tim Tuan, Peter McColgan +2 more 2022-05-17
11288222 Multi-die integrated circuit with data processing engine array Tim Tuan, Sridhar Subramanian 2022-03-29
11113223 Dual mode interconnect Peter McColgan, Goran H K Bilski, Jan Langer, Baris Ozgul, David Clarke 2021-09-07
11061673 Data selection network for a data processing engine in an integrated circuit Baris Ozgul, Jan Langer, Goran H K Bilski, Richard L. Walke 2021-07-13
11063594 Adaptive integrated programmable device platform Sagheer Ahmad, Jaideep Dastidar, Brian C. Gaide, Ian A. Swarbrick 2021-07-13
11016822 Cascade streaming between data processing engines in an array Goran H K Bilski, Jan Langer, Baris Ozgul, Richard L. Walke 2021-05-25
10990552 Streaming interconnect architecture for data processing engine array Goran H K Bilski, Peter McColgan, Baris Ozgul, Jan Langer, Richard L. Walke +4 more 2021-04-27
10866753 Data processing engine arrangement in a device Goran H K Bilski, Jan Langer, Baris Ozgul, Tim Tuan, Richard L. Walke +3 more 2020-12-15
10824584 Device with data processing engine array that enables partial reconfiguration Sneha Bhalchandra Date, Jan Langer, Baris Ozgul, Goran H K Bilski 2020-11-03
10747531 Core for a data processing engine in an integrated circuit Jan Langer, Baris Ozgul, Goran H K Bilski, Tim Tuan 2020-08-18