Issued Patents All Time
Showing 26–50 of 54 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8228749 | Margin testing of static random access memory cells | Wah Kit Loh, Lakshmikantha V. Holla, Parvinder Kumar Rana | 2012-07-24 |
| 8174914 | Method and structure for SRAM Vmin/Vmax measurement | Wah Kit Loh | 2012-05-08 |
| 8139431 | Structure and methods for measuring margins in an SRAM bit | Theodore W. Houston, Wah Kit Loh | 2012-03-20 |
| 8064279 | Structure and method for screening SRAMS | Theodore W. Houston | 2011-11-22 |
| 7936623 | Universal structure for memory cell characterization | Theodore W. Houston | 2011-05-03 |
| 7924640 | Method for memory cell characterization using universal structure | Wah Kit Loh | 2011-04-12 |
| 7855907 | Mitigation of charge sharing in memory devices | Xiaowei Zhu | 2010-12-21 |
| 7821816 | Method for constructing Shmoo plots for SRAMs | Theodore W. Houston, Wah Kit Loh | 2010-10-26 |
| 7816740 | Memory cell layout structure with outer bitline | Theodore W. Houston | 2010-10-19 |
| 7499354 | Method for testing transistors having an active region that is common with other transistors and a testing circuit for accomplishing the same | Theodore W. Houston, Tito Gelsomini | 2009-03-03 |
| 7301849 | System for reducing row periphery power consumption in memory devices | Theodore W. Houston, Bryan Sheffield | 2007-11-27 |
| 7298663 | Bit line control for low power in standby | Theodore W. Houston | 2007-11-20 |
| 7164596 | SRAM cell with column select line | Theodore W. Houston | 2007-01-16 |
| 7120082 | System for reducing row periphery power consumption in memory devices | Theodore W. Houston, Bryan Sheffield | 2006-10-10 |
| 7061820 | Voltage keeping scheme for low-leakage memory devices | — | 2006-06-13 |
| 7039818 | Low leakage SRAM scheme | Theodore W. Houston | 2006-05-02 |
| 7027346 | Bit line control for low power in standby | Theodore W. Houston | 2006-04-11 |
| 6975143 | Static logic design for CMOS | — | 2005-12-13 |
| 6956398 | Leakage current reduction method | Hugh Mair, Luan Dang, George B. Jamison, Tam Minh Dai Tran, Shyh-Horng Yang +1 more | 2005-10-18 |
| 6925025 | SRAM device and a method of powering-down the same | Theodore W. Houston | 2005-08-02 |
| 6922370 | High performance SRAM device and method of powering-down the same | Hugh Mair, Theodore W. Houston, Luan Dang | 2005-07-26 |
| 6870375 | System and method for measuring a capacitance associated with an integrated circuit | Robin C. Sarma, James D. Gallia | 2005-03-22 |
| 6801057 | Silicon-on-insulator dynamic logic | — | 2004-10-05 |
| 6731533 | Loadless 4T SRAM cell with PMOS drivers | Theodore W. Houston | 2004-05-04 |
| 6573549 | Dynamic threshold voltage 6T SRAM cell | Theodore W. Houston | 2003-06-03 |