| 7638412 |
Method and system for reducing charge damage in silicon-on-insulator technology |
Srikanth Krishnan, Anand Krishnan |
2009-12-29 |
| 7262468 |
Method and system for reducing charge damage in silicon-on-insulator technology |
Srikanth Krishnan, Anand Krishnan |
2007-08-28 |
| 6870375 |
System and method for measuring a capacitance associated with an integrated circuit |
Robin C. Sarma, Xiaowei Deng |
2005-03-22 |
| 6708303 |
Method and apparatus for controlling a seperate scan output of a scan circuit |
— |
2004-03-16 |
| 6563158 |
Method and apparatus for voltage stiffening in an integrated circuit |
Theodore W. Houston |
2003-05-13 |
| 5173623 |
High performance BiCMOS logic circuits with full output voltage swing up to four predetermined voltage values |
Kwok K. Chau, Ashwin H. Shah |
1992-12-22 |
| 5126973 |
Redundancy scheme for eliminating defects in a memory device |
Jim Childers |
1992-06-30 |
| 5107147 |
Base cell for semi-custom circuit with merged technology |
Ah-Lyan Yee |
1992-04-21 |
| 5019888 |
Circuit to improve electrostatic discharge protection |
David B. Scott, Patrick W. Bosshart |
1991-05-28 |
| 4723228 |
Memory decoding circuit |
Ashwin H. Shah, Shivaling S. Mahant-Shetti |
1988-02-02 |
| 4604727 |
Memory with configuration RAM |
Ashwin H. Shah, Pallab K. Chatterjee, Shivaling S. Mahant-Shetti |
1986-08-05 |
| 4601019 |
Memory with redundancy |
Ashwin H. Shah, I-Fay Wang, Shivaling S. Mahant-Shetti |
1986-07-15 |