| D955490 |
Game board |
— |
2022-06-21 |
| 5395797 |
Antifuse structure and method of fabrication |
Kueing-Long Chen, David Kuan-Yu Liu |
1995-03-07 |
| 5173623 |
High performance BiCMOS logic circuits with full output voltage swing up to four predetermined voltage values |
Kwok K. Chau, James D. Gallia |
1992-12-22 |
| 5102817 |
Vertical DRAM cell and method |
Pallab K. Chatterjee |
1992-04-07 |
| 4958212 |
Trench memory cell |
Clarence W. Teng, William F. Richardson, Robert Reid Doering, Bing W. Shen, Mark Bordelon |
1990-09-18 |
| 4918658 |
Static random access memory with asynchronous power-down |
Pallab K. Chatterjee |
1990-04-17 |
| 4916524 |
Dram cell and method |
Clarence W. Teng, Robert Reid Doering |
1990-04-10 |
| 4830978 |
Dram cell and method |
Clarence W. Teng, Robert Reid Doering |
1989-05-16 |
| 4810906 |
Vertical inverter circuit |
Pallab K. Chatterjee |
1989-03-07 |
| 4800525 |
Dual ended folded bit line arrangement and addressing scheme |
Richard Womack, Chu-Ping Wang |
1989-01-24 |
| 4767947 |
Constant pulse width generator |
— |
1988-08-30 |
| 4750839 |
Semiconductor memory with static column decode and page mode addressing capability |
Chu-Ping Wang, Richard Womack |
1988-06-14 |
| 4723228 |
Memory decoding circuit |
James D. Gallia, Shivaling S. Mahant-Shetti |
1988-02-02 |
| 4685087 |
SRAM with constant pulse width |
— |
1987-08-04 |
| 4673962 |
Vertical DRAM cell and method |
Pallab K. Chatterjee |
1987-06-16 |
| 4611131 |
Low power decoder-driver circuit |
— |
1986-09-09 |
| 4604727 |
Memory with configuration RAM |
Pallab K. Chatterjee, James D. Gallia, Shivaling S. Mahant-Shetti |
1986-08-05 |
| 4601019 |
Memory with redundancy |
James D. Gallia, I-Fay Wang, Shivaling S. Mahant-Shetti |
1986-07-15 |
| 4586166 |
SRAM with improved sensing circuit |
— |
1986-04-29 |
| 4503341 |
Power-down inverter circuit |
— |
1985-03-05 |